Lines Matching +full:0 +full:xffd10000
21 service_reserved: svcbuffer@0 {
23 reg = <0x0 0x0 0x0 0x1000000>;
24 alignment = <0x1000>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
37 reg = <0x0>;
44 reg = <0x1>;
51 reg = <0x2>;
58 reg = <0x3>;
64 interrupts = <0 170 4>,
65 <0 171 4>,
66 <0 172 4>,
67 <0 173 4>;
84 reg = <0x0 0xfffc1000 0x0 0x1000>,
85 <0x0 0xfffc2000 0x0 0x2000>,
86 <0x0 0xfffc4000 0x0 0x2000>,
87 <0x0 0xfffc6000 0x0 0x2000>;
96 ranges = <0 0 0 0xffffffff>;
99 #address-cells = <0x1>;
100 #size-cells = <0x1>;
108 reg = <0xffd10000 0x1000>;
114 #clock-cells = <0>;
119 #clock-cells = <0>;
124 #clock-cells = <0>;
129 #clock-cells = <0>;
134 #clock-cells = <0>;
142 reg = <0xff800000 0x2000>;
143 interrupts = <0 90 4>;
154 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
160 reg = <0xff802000 0x2000>;
161 interrupts = <0 91 4>;
172 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
178 reg = <0xff804000 0x2000>;
179 interrupts = <0 92 4>;
190 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
196 #size-cells = <0>;
198 reg = <0xffc03200 0x100>;
202 porta: gpio-controller@0 {
207 reg = <0>;
210 interrupts = <0 110 4>;
216 #size-cells = <0>;
218 reg = <0xffc03300 0x100>;
222 portb: gpio-controller@0 {
227 reg = <0>;
230 interrupts = <0 111 4>;
236 #size-cells = <0>;
238 reg = <0xffc02800 0x100>;
239 interrupts = <0 103 4>;
247 #size-cells = <0>;
249 reg = <0xffc02900 0x100>;
250 interrupts = <0 104 4>;
258 #size-cells = <0>;
260 reg = <0xffc02a00 0x100>;
261 interrupts = <0 105 4>;
269 #size-cells = <0>;
271 reg = <0xffc02b00 0x100>;
272 interrupts = <0 106 4>;
280 #size-cells = <0>;
282 reg = <0xffc02c00 0x100>;
283 interrupts = <0 107 4>;
291 #size-cells = <0>;
293 reg = <0xff808000 0x1000>;
294 interrupts = <0 96 4>;
295 fifo-depth = <0x400>;
307 #size-cells = <0>;
309 reg = <0xffb90000 0x10000>,
310 <0xffb80000 0x1000>;
312 interrupts = <0 97 4>;
323 reg = <0xffe00000 0x100000>;
328 reg = <0xffda0000 0x1000>;
329 interrupts = <0 81 4>,
330 <0 82 4>,
331 <0 83 4>,
332 <0 84 4>,
333 <0 85 4>,
334 <0 86 4>,
335 <0 87 4>,
336 <0 88 4>,
337 <0 89 4>;
350 reg = <0xffd11000 0x1000>;
355 reg = <0xfa000000 0x40000>;
361 interrupts = <0 128 4>, /* Global Secure Fault */
362 <0 129 4>, /* Global Non-secure Fault */
364 <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
365 <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
366 <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
367 <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
368 <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
369 <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
370 <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
371 <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
372 stream-match-mask = <0x7ff0>;
379 #size-cells = <0>;
380 reg = <0xffda4000 0x1000>;
381 interrupts = <0 99 4>;
393 #size-cells = <0>;
394 reg = <0xffda5000 0x1000>;
395 interrupts = <0 100 4>;
406 reg = <0xffd12000 0x228>;
412 interrupts = <1 13 0xf08>,
413 <1 14 0xf08>,
414 <1 11 0xf08>,
415 <1 10 0xf08>;
420 interrupts = <0 113 4>;
421 reg = <0xffc03000 0x100>;
428 interrupts = <0 114 4>;
429 reg = <0xffc03100 0x100>;
436 interrupts = <0 115 4>;
437 reg = <0xffd00000 0x100>;
444 interrupts = <0 116 4>;
445 reg = <0xffd00100 0x100>;
452 reg = <0xffc02000 0x100>;
453 interrupts = <0 108 4>;
463 reg = <0xffc02100 0x100>;
464 interrupts = <0 109 4>;
472 usbphy0: usbphy@0 {
473 #phy-cells = <0>;
480 reg = <0xffb00000 0x40000>;
481 interrupts = <0 93 4>;
493 reg = <0xffb40000 0x40000>;
494 interrupts = <0 94 4>;
506 reg = <0xffd00200 0x100>;
507 interrupts = <0 117 4>;
515 reg = <0xffd00300 0x100>;
516 interrupts = <0 118 4>;
524 reg = <0xffd00400 0x100>;
525 interrupts = <0 125 4>;
533 reg = <0xffd00500 0x100>;
534 interrupts = <0 126 4>;
542 reg = <0xf8011100 0xc0>;
551 interrupts = <0 15 4>;
565 reg = <0xff8cc000 0x100>;
573 reg = <0xff8c4000 0x100>;
581 reg = <0xff8c0000 0x100>;
589 reg = <0xff8c0400 0x100>;
599 #size-cells = <0>;
600 reg = <0xff8d2000 0x100>,
601 <0xff900000 0x100000>;
602 interrupts = <0 3 4>;
605 cdns,trigger-address = <0x00000000>;