8  * This C source file is part of the SoftFloat IEC/IEEE Floating-point
14  * National Science Foundation under grant MIP-9311980.  The original version
15  * of this code was written as part of a project to build a fixed-point vector
44 	.sign		= 0,
51 		 str, d->sign != 0, d->exponent, d->significand);  in vfp_double_dump()
56 	int bits = 31 - fls(vd->significand >> 32);  in vfp_double_normalise_denormal()
58 		bits = 63 - fls(vd->significand);  in vfp_double_normalise_denormal()
63 		vd->exponent -= bits - 1;  in vfp_double_normalise_denormal()
64 		vd->significand <<= bits;  in vfp_double_normalise_denormal()
81 	if (vd->exponent == 2047 && (vd->significand == 0 || exceptions))  in vfp_double_normaliseround()
85 	 * Special-case zero.  in vfp_double_normaliseround()
87 	if (vd->significand == 0) {  in vfp_double_normaliseround()
88 		vd->exponent = 0;  in vfp_double_normaliseround()
92 	exponent = vd->exponent;  in vfp_double_normaliseround()
93 	significand = vd->significand;  in vfp_double_normaliseround()
95 	shift = 32 - fls(significand >> 32);  in vfp_double_normaliseround()
97 		shift = 64 - fls(significand);  in vfp_double_normaliseround()
99 		exponent -= shift;  in vfp_double_normaliseround()
104 	vd->exponent = exponent;  in vfp_double_normaliseround()
105 	vd->significand = significand;  in vfp_double_normaliseround()
112 	underflow = exponent < 0;  in vfp_double_normaliseround()
114 		significand = vfp_shiftright64jamming(significand, -exponent);  in vfp_double_normaliseround()
115 		exponent = 0;  in vfp_double_normaliseround()
117 		vd->exponent = exponent;  in vfp_double_normaliseround()
118 		vd->significand = significand;  in vfp_double_normaliseround()
121 		if (!(significand & ((1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1)))  in vfp_double_normaliseround()
122 			underflow = 0;  in vfp_double_normaliseround()
128 	incr = 0;  in vfp_double_normaliseround()
133 		if ((significand & (1ULL << (VFP_DOUBLE_LOW_BITS + 1))) == 0)  in vfp_double_normaliseround()
134 			incr -= 1;  in vfp_double_normaliseround()
136 		incr = 0;  in vfp_double_normaliseround()
137 	} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vd->sign != 0))  in vfp_double_normaliseround()
138 		incr = (1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1;  in vfp_double_normaliseround()
140 	pr_debug("VFP: rounding increment = 0x%08llx\n", incr);  in vfp_double_normaliseround()
150 		vd->exponent = exponent;  in vfp_double_normaliseround()
151 		vd->significand = significand;  in vfp_double_normaliseround()
158 	 * number) are non-zero, the result is inexact.  in vfp_double_normaliseround()
160 	if (significand & ((1 << (VFP_DOUBLE_LOW_BITS + 1)) - 1))  in vfp_double_normaliseround()
173 		if (incr == 0) {  in vfp_double_normaliseround()
174 			vd->exponent = 2045;  in vfp_double_normaliseround()
175 			vd->significand = 0x7fffffffffffffffULL;  in vfp_double_normaliseround()
177 			vd->exponent = 2047;		/* infinity */  in vfp_double_normaliseround()
178 			vd->significand = 0;  in vfp_double_normaliseround()
181 		if (significand >> (VFP_DOUBLE_LOW_BITS + 1) == 0)  in vfp_double_normaliseround()
182 			exponent = 0;  in vfp_double_normaliseround()
183 		if (exponent || significand > 0x8000000000000000ULL)  in vfp_double_normaliseround()
184 			underflow = 0;  in vfp_double_normaliseround()
187 		vd->exponent = exponent;  in vfp_double_normaliseround()
188 		vd->significand = significand >> 1;  in vfp_double_normaliseround()
211 	int tn, tm = 0;  in vfp_propagate_nan()
220 		 * Default NaN mode - always returns a quiet NaN  in vfp_propagate_nan()
225 		 * Contemporary mode - select the first signalling  in vfp_propagate_nan()
236 		nan->significand |= VFP_DOUBLE_SIGNIFICAND_QNAN;  in vfp_propagate_nan()
253 	return 0;  in vfp_double_fabs()
259 	return 0;  in vfp_double_fcpy()
265 	return 0;  in vfp_double_fneg()
280 		else if (vdm.sign == 0) {  in vfp_double_fsqrt()
283 			ret = 0;  in vfp_double_fsqrt()
294 	 * sqrt(+/- 0) == +/- 0  in vfp_double_fsqrt()
306 	 * sqrt(<0) = invalid  in vfp_double_fsqrt()
316 	vdd.sign = 0;  in vfp_double_fsqrt()
317 	vdd.exponent = ((vdm.exponent - 1023) >> 1) + 1023;  in vfp_double_fsqrt()
323 	vdd.significand += 2 + vfp_estimate_div128to64(vdm.significand, 0, vdd.significand);  in vfp_double_fsqrt()
332 			vdd.significand = ~0ULL;  in vfp_double_fsqrt()
337 			sub128(&remh, &reml, vdm.significand, 0, termh, terml);  in vfp_double_fsqrt()
338 			while ((s64)remh < 0) {  in vfp_double_fsqrt()
339 				vdd.significand -= 1;  in vfp_double_fsqrt()
344 			vdd.significand |= (remh | reml) != 0;  in vfp_double_fsqrt()
349 	return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fsqrt");  in vfp_double_fsqrt()
361 	u32 ret = 0;  in vfp_compare()
366 		if (signal_on_qnan || !(vfp_double_packed_mantissa(m) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))  in vfp_compare()
376 		if (signal_on_qnan || !(vfp_double_packed_mantissa(d) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))  in vfp_compare()
383 	if (ret == 0) {  in vfp_compare()
384 		if (d == m || vfp_double_packed_abs(d | m) == 0) {  in vfp_compare()
403 		} else if ((vfp_double_packed_sign(d) != 0) ^ (d < m)) {  in vfp_compare()
408 		} else if ((vfp_double_packed_sign(d) != 0) ^ (d > m)) {  in vfp_compare()
421 	return vfp_compare(dd, 0, dm, fpscr);  in vfp_double_fcmp()
431 	return vfp_compare(dd, 0, VFP_REG_ZERO, fpscr);  in vfp_double_fcmpz()
444 	u32 exceptions = 0;  in vfp_double_fcvts()
471 		vsd.exponent = 0;  in vfp_double_fcvts()
473 		vsd.exponent = vdm.exponent - (1023 - 127);  in vfp_double_fcvts()
487 	vdm.sign = 0;  in vfp_double_fuito()
488 	vdm.exponent = 1023 + 63 - 1;  in vfp_double_fuito()
491 	return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fuito");  in vfp_double_fuito()
499 	vdm.sign = (m & 0x80000000) >> 16;  in vfp_double_fsito()
500 	vdm.exponent = 1023 + 63 - 1;  in vfp_double_fsito()
501 	vdm.significand = vdm.sign ? -m : m;  in vfp_double_fsito()
503 	return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fsito");  in vfp_double_fsito()
509 	u32 d, exceptions = 0;  in vfp_double_ftoui()
523 		vdm.sign = 0;  in vfp_double_ftoui()
525 	if (vdm.exponent >= 1023 + 32) {  in vfp_double_ftoui()
526 		d = vdm.sign ? 0 : 0xffffffff;  in vfp_double_ftoui()
528 	} else if (vdm.exponent >= 1023 - 1) {  in vfp_double_ftoui()
529 		int shift = 1023 + 63 - vdm.exponent;  in vfp_double_ftoui()
530 		u64 rem, incr = 0;  in vfp_double_ftoui()
533 		 * 2^0 <= m < 2^32-2^8  in vfp_double_ftoui()
536 		rem = vdm.significand << (65 - shift);  in vfp_double_ftoui()
539 			incr = 0x8000000000000000ULL;  in vfp_double_ftoui()
540 			if ((d & 1) == 0)  in vfp_double_ftoui()
541 				incr -= 1;  in vfp_double_ftoui()
543 			incr = 0;  in vfp_double_ftoui()
544 		} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {  in vfp_double_ftoui()
545 			incr = ~0ULL;  in vfp_double_ftoui()
549 			if (d < 0xffffffff)  in vfp_double_ftoui()
556 			d = 0;  in vfp_double_ftoui()
561 		d = 0;  in vfp_double_ftoui()
564 			if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)  in vfp_double_ftoui()
567 				d = 0;  in vfp_double_ftoui()
588 	u32 d, exceptions = 0;  in vfp_double_ftosi()
603 		d = 0;  in vfp_double_ftosi()
605 	} else if (vdm.exponent >= 1023 + 32) {  in vfp_double_ftosi()
606 		d = 0x7fffffff;  in vfp_double_ftosi()
610 	} else if (vdm.exponent >= 1023 - 1) {  in vfp_double_ftosi()
611 		int shift = 1023 + 63 - vdm.exponent;	/* 58 */  in vfp_double_ftosi()
612 		u64 rem, incr = 0;  in vfp_double_ftosi()
615 		rem = vdm.significand << (65 - shift);  in vfp_double_ftosi()
618 			incr = 0x8000000000000000ULL;  in vfp_double_ftosi()
619 			if ((d & 1) == 0)  in vfp_double_ftosi()
620 				incr -= 1;  in vfp_double_ftosi()
622 			incr = 0;  in vfp_double_ftosi()
623 		} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {  in vfp_double_ftosi()
624 			incr = ~0ULL;  in vfp_double_ftosi()
627 		if ((rem + incr) < rem && d < 0xffffffff)  in vfp_double_ftosi()
629 		if (d > 0x7fffffff + (vdm.sign != 0)) {  in vfp_double_ftosi()
630 			d = 0x7fffffff + (vdm.sign != 0);  in vfp_double_ftosi()
636 			d = -d;  in vfp_double_ftosi()
638 		d = 0;  in vfp_double_ftosi()
641 			if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)  in vfp_double_ftosi()
644 				d = -1;  in vfp_double_ftosi()
662 	[FEXT_TO_IDX(FEXT_FCPY)]	= { vfp_double_fcpy,   0 },
663 	[FEXT_TO_IDX(FEXT_FABS)]	= { vfp_double_fabs,   0 },
664 	[FEXT_TO_IDX(FEXT_FNEG)]	= { vfp_double_fneg,   0 },
665 	[FEXT_TO_IDX(FEXT_FSQRT)]	= { vfp_double_fsqrt,  0 },
687 	u32 exceptions = 0;  in vfp_double_fadd_nonnumber()
697 		if (vdn->sign ^ vdm->sign) {  in vfp_double_fadd_nonnumber()
699 			 * different signs -> invalid  in vfp_double_fadd_nonnumber()
705 			 * same signs -> valid  in vfp_double_fadd_nonnumber()
711 		 * One infinity and one number -> infinity  in vfp_double_fadd_nonnumber()
731 	if (vdn->significand & (1ULL << 63) ||  in vfp_double_add()
732 	    vdm->significand & (1ULL << 63)) {  in vfp_double_add()
743 	if (vdn->exponent < vdm->exponent) {  in vfp_double_add()
753 	if (vdn->exponent == 2047)  in vfp_double_add()
766 	exp_diff = vdn->exponent - vdm->exponent;  in vfp_double_add()
767 	m_sig = vfp_shiftright64jamming(vdm->significand, exp_diff);  in vfp_double_add()
772 	if (vdn->sign ^ vdm->sign) {  in vfp_double_add()
773 		m_sig = vdn->significand - m_sig;  in vfp_double_add()
774 		if ((s64)m_sig < 0) {  in vfp_double_add()
775 			vdd->sign = vfp_sign_negate(vdd->sign);  in vfp_double_add()
776 			m_sig = -m_sig;  in vfp_double_add()
777 		} else if (m_sig == 0) {  in vfp_double_add()
778 			vdd->sign = (fpscr & FPSCR_RMODE_MASK) ==  in vfp_double_add()
779 				      FPSCR_ROUND_MINUSINF ? 0x8000 : 0;  in vfp_double_add()
782 		m_sig += vdn->significand;  in vfp_double_add()
784 	vdd->significand = m_sig;  in vfp_double_add()
786 	return 0;  in vfp_double_add()
801 	if (vdn->exponent < vdm->exponent) {  in vfp_double_multiply()
805 		pr_debug("VFP: swapping M <-> N\n");  in vfp_double_multiply()
808 	vdd->sign = vdn->sign ^ vdm->sign;  in vfp_double_multiply()
813 	if (vdn->exponent == 2047) {  in vfp_double_multiply()
814 		if (vdn->significand || (vdm->exponent == 2047 && vdm->significand))  in vfp_double_multiply()
816 		if ((vdm->exponent | vdm->significand) == 0) {  in vfp_double_multiply()
820 		vdd->exponent = vdn->exponent;  in vfp_double_multiply()
821 		vdd->significand = 0;  in vfp_double_multiply()
822 		return 0;  in vfp_double_multiply()
829 	if ((vdm->exponent | vdm->significand) == 0) {  in vfp_double_multiply()
830 		vdd->exponent = 0;  in vfp_double_multiply()
831 		vdd->significand = 0;  in vfp_double_multiply()
832 		return 0;  in vfp_double_multiply()
837 	 * as the addition case - though this time we have +1 from  in vfp_double_multiply()
840 	vdd->exponent = vdn->exponent + vdm->exponent - 1023 + 2;  in vfp_double_multiply()
841 	vdd->significand = vfp_hi64multiply64(vdn->significand, vdm->significand);  in vfp_double_multiply()
844 	return 0;  in vfp_double_multiply()
847 #define NEG_MULTIPLY	(1 << 0)
857 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_multiply_accumulate()
861 	if (vdm.exponent == 0 && vdm.significand)  in vfp_double_multiply_accumulate()
869 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_multiply_accumulate()
888 	return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, 0, "fmac");  in vfp_double_fmac()
892  * sd = sd - (sn * sm)
900  * sd = -sd + (sn * sm)
908  * sd = -sd - (sn * sm)
924 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_fmul()
928 	if (vdm.exponent == 0 && vdm.significand)  in vfp_double_fmul()
936  * sd = -(sn * sm)
944 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_fnmul()
948 	if (vdm.exponent == 0 && vdm.significand)  in vfp_double_fnmul()
966 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_fadd()
970 	if (vdm.exponent == 0 && vdm.significand)  in vfp_double_fadd()
979  * sd = sn - sm
987 	if (vdn.exponent == 0 && vdn.significand)  in vfp_double_fsub()
991 	if (vdm.exponent == 0 && vdm.significand)  in vfp_double_fsub()
1010 	u32 exceptions = 0;  in vfp_double_fdiv()
1066 	vdd.exponent = vdn.exponent - vdm.exponent + 1023 - 1;  in vfp_double_fdiv()
1072 	vdd.significand = vfp_estimate_div128to64(vdn.significand, 0, vdm.significand);  in vfp_double_fdiv()
1073 	if ((vdd.significand & 0x1ff) <= 2) {  in vfp_double_fdiv()
1076 		sub128(&remh, &reml, vdn.significand, 0, termh, terml);  in vfp_double_fdiv()
1077 		while ((s64)remh < 0) {  in vfp_double_fdiv()
1078 			vdd.significand -= 1;  in vfp_double_fdiv()
1079 			add128(&remh, &reml, remh, reml, 0, vdm.significand);  in vfp_double_fdiv()
1081 		vdd.significand |= (reml != 0);  in vfp_double_fdiv()
1083 	return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fdiv");  in vfp_double_fdiv()
1096 	vdd.exponent = 0;  in vfp_double_fdiv()
1097 	vdd.significand = 0;  in vfp_double_fdiv()
1104 	vdd.significand = 0;  in vfp_double_fdiv()
1113 	[FOP_TO_IDX(FOP_FMAC)]	= { vfp_double_fmac,  0 },
1114 	[FOP_TO_IDX(FOP_FNMAC)]	= { vfp_double_fnmac, 0 },
1115 	[FOP_TO_IDX(FOP_FMSC)]	= { vfp_double_fmsc,  0 },
1116 	[FOP_TO_IDX(FOP_FNMSC)]	= { vfp_double_fnmsc, 0 },
1117 	[FOP_TO_IDX(FOP_FMUL)]	= { vfp_double_fmul,  0 },
1118 	[FOP_TO_IDX(FOP_FNMUL)]	= { vfp_double_fnmul, 0 },
1119 	[FOP_TO_IDX(FOP_FADD)]	= { vfp_double_fadd,  0 },
1120 	[FOP_TO_IDX(FOP_FSUB)]	= { vfp_double_fsub,  0 },
1121 	[FOP_TO_IDX(FOP_FDIV)]	= { vfp_double_fdiv,  0 },
1124 #define FREG_BANK(x)	((x) & 0x0c)
1130 	u32 exceptions = 0;  in vfp_double_cpdo()
1145 	if (fop->flags & OP_SD)  in vfp_double_cpdo()
1153 	if (fop->flags & OP_SM)  in vfp_double_cpdo()
1162 	if ((fop->flags & OP_SCALAR) || (FREG_BANK(dest) == 0))  in vfp_double_cpdo()
1163 		veclen = 0;  in vfp_double_cpdo()
1170 	if (!fop->fn)  in vfp_double_cpdo()
1173 	for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) {  in vfp_double_cpdo()
1177 		type = fop->flags & OP_SD ? 's' : 'd';  in vfp_double_cpdo()
1187 		except = fop->fn(dest, dn, dm, fpscr);  in vfp_double_cpdo()
1199 		if (FREG_BANK(dm) != 0)  in vfp_double_cpdo()
1205 	return ~0;  in vfp_double_cpdo()