Lines Matching +full:omap +full:- +full:sdma
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/plat-omap/dma.c
5 * Copyright (C) 2003 - 2008 Nokia Corporation
10 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
12 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
15 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
17 * Support functions for the OMAP internal DMA channels.
19 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
21 * - G, Manjunath Kondaiah <manjugk@ti.com>
35 #include <linux/omap-dma.h>
43 * channels that an instance of the SDMA IP block can support. Used
45 * than this -- for example, OMAP1 SDMA instances only support 17 logical
96 /* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
108 u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4; in set_gdma_dev()
109 int shift = ((req - 1) % 5) * 6; in set_gdma_dev()
114 l |= (dev - 1) << shift; in set_gdma_dev()
160 ccr = p->dma_read(CCR, lch); in omap_set_dma_priority()
165 p->dma_write(ccr, CCR, lch); in omap_set_dma_priority()
176 l = p->dma_read(CSDP, lch); in omap_set_dma_transfer_params()
179 p->dma_write(l, CSDP, lch); in omap_set_dma_transfer_params()
184 ccr = p->dma_read(CCR, lch); in omap_set_dma_transfer_params()
188 p->dma_write(ccr, CCR, lch); in omap_set_dma_transfer_params()
190 ccr = p->dma_read(CCR2, lch); in omap_set_dma_transfer_params()
194 p->dma_write(ccr, CCR2, lch); in omap_set_dma_transfer_params()
200 val = p->dma_read(CCR, lch); in omap_set_dma_transfer_params()
225 p->dma_write(val, CCR, lch); in omap_set_dma_transfer_params()
228 p->dma_write(elem_count, CEN, lch); in omap_set_dma_transfer_params()
229 p->dma_write(frame_count, CFN, lch); in omap_set_dma_transfer_params()
238 l = p->dma_read(LCH_CTRL, lch); in omap_set_dma_channel_mode()
241 p->dma_write(l, LCH_CTRL, lch); in omap_set_dma_channel_mode()
256 w = p->dma_read(CSDP, lch); in omap_set_dma_src_params()
259 p->dma_write(w, CSDP, lch); in omap_set_dma_src_params()
262 l = p->dma_read(CCR, lch); in omap_set_dma_src_params()
265 p->dma_write(l, CCR, lch); in omap_set_dma_src_params()
267 p->dma_write(src_start, CSSA, lch); in omap_set_dma_src_params()
269 p->dma_write(src_ei, CSEI, lch); in omap_set_dma_src_params()
270 p->dma_write(src_fi, CSFI, lch); in omap_set_dma_src_params()
278 l = p->dma_read(CSDP, lch); in omap_set_dma_src_data_pack()
282 p->dma_write(l, CSDP, lch); in omap_set_dma_src_data_pack()
291 l = p->dma_read(CSDP, lch); in omap_set_dma_src_burst_mode()
325 p->dma_write(l, CSDP, lch); in omap_set_dma_src_burst_mode()
337 l = p->dma_read(CSDP, lch); in omap_set_dma_dest_params()
340 p->dma_write(l, CSDP, lch); in omap_set_dma_dest_params()
343 l = p->dma_read(CCR, lch); in omap_set_dma_dest_params()
346 p->dma_write(l, CCR, lch); in omap_set_dma_dest_params()
348 p->dma_write(dest_start, CDSA, lch); in omap_set_dma_dest_params()
350 p->dma_write(dst_ei, CDEI, lch); in omap_set_dma_dest_params()
351 p->dma_write(dst_fi, CDFI, lch); in omap_set_dma_dest_params()
359 l = p->dma_read(CSDP, lch); in omap_set_dma_dest_data_pack()
363 p->dma_write(l, CSDP, lch); in omap_set_dma_dest_data_pack()
372 l = p->dma_read(CSDP, lch); in omap_set_dma_dest_burst_mode()
403 p->dma_write(l, CSDP, lch); in omap_set_dma_dest_burst_mode()
411 p->dma_read(CSR, lch); in omap_enable_channel_irq()
413 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); in omap_enable_channel_irq()
416 p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); in omap_enable_channel_irq()
422 p->dma_write(0, CICR, lch); in omap_disable_channel_irq()
425 p->dma_read(CSR, lch); in omap_disable_channel_irq()
427 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); in omap_disable_channel_irq()
440 l = p->dma_read(CLNK_CTRL, lch); in enable_lnk()
446 if (dma_chan[lch].next_lch != -1) in enable_lnk()
449 p->dma_write(l, CLNK_CTRL, lch); in enable_lnk()
456 l = p->dma_read(CLNK_CTRL, lch); in disable_lnk()
471 p->dma_write(l, CLNK_CTRL, lch); in disable_lnk()
479 int ch, free_ch = -1; in omap_request_dma()
483 …WARN(strcmp(dev_name, "DMA engine"), "Using deprecated platform DMA API - please update to DMA eng… in omap_request_dma()
487 if (free_ch == -1 && dma_chan[ch].dev_id == -1) { in omap_request_dma()
493 if (free_ch == -1) { in omap_request_dma()
495 return -EBUSY; in omap_request_dma()
498 chan->dev_id = dev_id; in omap_request_dma()
500 if (p->clear_lch_regs) in omap_request_dma()
501 p->clear_lch_regs(free_ch); in omap_request_dma()
505 chan->dev_name = dev_name; in omap_request_dma()
506 chan->callback = callback; in omap_request_dma()
507 chan->data = data; in omap_request_dma()
508 chan->flags = 0; in omap_request_dma()
510 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; in omap_request_dma()
513 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ; in omap_request_dma()
525 p->dma_write(dev_id | (1 << 10), CCR, free_ch); in omap_request_dma()
527 p->dma_write(dev_id, CCR, free_ch); in omap_request_dma()
540 if (dma_chan[lch].dev_id == -1) { in omap_free_dma()
550 p->dma_write(0, CCR, lch); in omap_free_dma()
553 dma_chan[lch].dev_id = -1; in omap_free_dma()
554 dma_chan[lch].next_lch = -1; in omap_free_dma()
569 p->clear_dma(lch); in omap_clear_dma()
582 p->dma_write(0, CPC, lch); in omap_start_dma()
584 p->dma_write(0, CDAC, lch); in omap_start_dma()
586 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { in omap_start_dma()
610 } while (next_lch != -1); in omap_start_dma()
612 p->dma_write(lch, CLNK_CTRL, lch); in omap_start_dma()
616 l = p->dma_read(CCR, lch); in omap_start_dma()
629 p->dma_write(l, CCR, lch); in omap_start_dma()
642 l = p->dma_read(CCR, lch); in omap_stop_dma()
648 /* Configure No-Standby */ in omap_stop_dma()
649 l = p->dma_read(OCP_SYSCONFIG, lch); in omap_stop_dma()
653 p->dma_write(l , OCP_SYSCONFIG, 0); in omap_stop_dma()
655 l = p->dma_read(CCR, lch); in omap_stop_dma()
657 p->dma_write(l, CCR, lch); in omap_stop_dma()
659 /* Wait for sDMA FIFO drain */ in omap_stop_dma()
660 l = p->dma_read(CCR, lch); in omap_stop_dma()
665 l = p->dma_read(CCR, lch); in omap_stop_dma()
670 p->dma_write(sys_cf, OCP_SYSCONFIG, lch); in omap_stop_dma()
673 p->dma_write(l, CCR, lch); in omap_stop_dma()
683 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { in omap_stop_dma()
699 } while (next_lch != -1); in omap_stop_dma()
713 * this function and process the returned value before re-enabling interrupt to
723 offset = p->dma_read(CPC, lch); in omap_get_dma_src_pos()
725 offset = p->dma_read(CSAC, lch); in omap_get_dma_src_pos()
728 offset = p->dma_read(CSAC, lch); in omap_get_dma_src_pos()
736 if (likely(p->dma_read(CDAC, lch))) in omap_get_dma_src_pos()
737 offset = p->dma_read(CSAC, lch); in omap_get_dma_src_pos()
739 offset = p->dma_read(CSSA, lch); in omap_get_dma_src_pos()
743 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); in omap_get_dma_src_pos()
752 * this function and process the returned value before re-enabling interrupt to
762 offset = p->dma_read(CPC, lch); in omap_get_dma_dst_pos()
764 offset = p->dma_read(CDAC, lch); in omap_get_dma_dst_pos()
767 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is in omap_get_dma_dst_pos()
771 offset = p->dma_read(CDAC, lch); in omap_get_dma_dst_pos()
778 offset = p->dma_read(CDSA, lch); in omap_get_dma_dst_pos()
782 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); in omap_get_dma_dst_pos()
790 return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0; in omap_get_dma_active_status()
803 if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) in omap_dma_running()
809 /*----------------------------------------------------------------------------*/
821 csr = p->dma_read(CSR, ch); in omap1_dma_handle_ch()
828 if (unlikely(dma_chan[ch].dev_id == -1)) { in omap1_dma_handle_ch()
848 int ch = ((int) dev_id) - 1; in omap1_dma_irq_handler()
881 p = pdev->dev.platform_data; in omap_system_dma_probe()
883 dev_err(&pdev->dev, in omap_system_dma_probe()
886 return -EINVAL; in omap_system_dma_probe()
889 d = p->dma_attr; in omap_system_dma_probe()
890 errata = p->errata; in omap_system_dma_probe()
892 if ((d->dev_caps & RESERVE_CHANNEL) && omap_dma_reserve_channels in omap_system_dma_probe()
893 && (omap_dma_reserve_channels < d->lch_count)) in omap_system_dma_probe()
894 d->lch_count = omap_dma_reserve_channels; in omap_system_dma_probe()
896 dma_lch_count = d->lch_count; in omap_system_dma_probe()
898 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; in omap_system_dma_probe()
900 dma_chan = devm_kcalloc(&pdev->dev, dma_lch_count, in omap_system_dma_probe()
903 return -ENOMEM; in omap_system_dma_probe()
909 dma_chan[ch].dev_id = -1; in omap_system_dma_probe()
910 dma_chan[ch].next_lch = -1; in omap_system_dma_probe()
941 if (d->dev_caps & HS_CHANNELS_RESERVED) { in omap_system_dma_probe()
946 p->show_dma_caps(); in omap_system_dma_probe()
987 MODULE_DESCRIPTION("OMAP SYSTEM DMA DRIVER");
992 * Reserve the omap SDMA channels using cmdline bootarg