Lines Matching +full:cortex +full:- +full:a8
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7.S
9 #include <linux/arm-smccc.h>
14 #include <asm/asm-offsets.h>
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
22 #include "proc-v7-3level.S"
24 #include "proc-v7-2level.S"
46 * - loc - location to jump to for soft reset
47 * - hyp - indicate if restart occurs in HYP mode
76 dsb @ WFI may enter a low-power mode
97 stmfd sp!, {r0 - r3}
101 ldmfd sp!, {r0 - r3}
106 stmfd sp!, {r0 - r3}
110 ldmfd sp!, {r0 - r3}
128 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
133 stmfd sp!, {r4 - r11, lr}
136 stmia r0!, {r4 - r5}
148 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
149 stmia r0, {r5 - r11}
150 ldmfd sp!, {r4 - r11, pc}
157 ldmia r0!, {r4 - r5}
160 ldmia r0, {r5 - r11}
182 mcr p15, 0, r10, c1, c0, 2 @ Co-processor access control
194 stmfd sp!, {r4 - r5}
197 stmia r0!, {r4 - r5}
198 ldmfd sp!, {r4 - r5}
203 ldmia r0!, {r4 - r5}
222 dsb @ WFI may enter a low-power mode
233 stmfd sp!, {r6 - r10}
234 mrc p15, 1, r6, c15, c1, 0 @ save CP15 - extra features
235 mrc p15, 1, r7, c15, c2, 0 @ save CP15 - Aux Func Modes Ctrl 0
236 mrc p15, 1, r8, c15, c1, 2 @ save CP15 - Aux Debug Modes Ctrl 2
237 mrc p15, 1, r9, c15, c1, 1 @ save CP15 - Aux Debug Modes Ctrl 1
238 mrc p15, 0, r10, c9, c14, 0 @ save CP15 - PMC
239 stmia r0!, {r6 - r10}
240 ldmfd sp!, {r6 - r10}
245 ldmia r0!, {r6 - r10}
246 mcr p15, 1, r6, c15, c1, 0 @ restore CP15 - extra features
247 mcr p15, 1, r7, c15, c2, 0 @ restore CP15 - Aux Func Modes Ctrl 0
248 mcr p15, 1, r8, c15, c1, 2 @ restore CP15 - Aux Debug Modes Ctrl 2
249 mcr p15, 1, r9, c15, c1, 1 @ restore CP15 - Aux Debug Modes Ctrl 1
250 mcr p15, 0, r10, c9, c14, 0 @ restore CP15 - PMC
265 * r1, r2, r4, r5, r9, r13 must be preserved - r13 is not a stack
274 * - cache type register is implemented
291 stmia r12, {r1-r6, lr} @ v7_invalidate_l1 touches r0-r6
293 ldmia r12, {r1-r6, lr}
308 * r3: contains MIDR rX number in bits 23-20
309 * r6: contains MIDR rXpY as 8-bit XY number
432 #define PJ4B_L1_REP_RR (1 << 30) /* L1 replacement - Strict round robin */
442 #define PJ4B_WFI_WFE (1 << 22) /* WFI/WFE - serve the DVM and back to idle */
477 stmia r12, {r1-r6, lr} @ v7_invalidate_l1 touches r0-r6
479 ldmia r12, {r1-r6, lr}
487 orr r6, r6, r3, lsr #20-4 @ combine variant and revision
490 /* Cortex-A8 Errata */
491 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
495 /* Cortex-A9 Errata */
496 ldr r10, =0x00000c09 @ Cortex-A9 primary part number
500 /* Cortex-A12 Errata */
501 ldr r10, =0x00000c0d @ Cortex-A12 primary part number
505 /* Cortex-A17 Errata */
506 ldr r10, =0x00000c0e @ Cortex-A17 primary part number
510 /* Cortex-A15 Errata */
511 ldr r10, =0x00000c0f @ Cortex-A15 primary part number
541 ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables
566 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
590 @ Cortex-A8 - always needs bpiall switch_mm implementation
605 @ Cortex-A9 - needs more registers preserved across suspend/resume
621 @ Cortex-A15 - needs iciallu switch_mm for hardening
673 * ARM Ltd. Cortex A5 processor.
680 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
683 * ARM Ltd. Cortex A9 processor.
690 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
693 * ARM Ltd. Cortex A8 processor.
700 .size __v7_ca8_proc_info, . - __v7_ca8_proc_info
713 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info
717 * ARM Ltd. Cortex R7 processor.
724 .size __v7_cr7mp_proc_info, . - __v7_cr7mp_proc_info
727 * ARM Ltd. Cortex R8 processor.
734 .size __v7_cr8mp_proc_info, . - __v7_cr8mp_proc_info
737 * ARM Ltd. Cortex A7 processor.
744 .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
747 * ARM Ltd. Cortex A12 processor.
754 .size __v7_ca12mp_proc_info, . - __v7_ca12mp_proc_info
757 * ARM Ltd. Cortex A15 processor.
764 .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
767 * Broadcom Corporation Brahma-B15 processor.
774 .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info
777 * ARM Ltd. Cortex A17 processor.
784 .size __v7_ca17mp_proc_info, . - __v7_ca17mp_proc_info
786 /* ARM Ltd. Cortex A73 processor */
792 .size __v7_ca73_proc_info, . - __v7_ca73_proc_info
794 /* ARM Ltd. Cortex A75 processor */
800 .size __v7_ca75_proc_info, . - __v7_ca75_proc_info
816 .size __krait_proc_info, . - __krait_proc_info
826 .size __v7_proc_info, . - __v7_proc_info