Lines Matching full:true

310 	[DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
311 [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
316 [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
317 [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
318 [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
319 [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
320 [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
321 [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
325 [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
328 [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 2), },
329 [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), },
330 [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), },
331 [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), },
332 [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
386 [DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
387 [DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 },
389 [DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 },
390 [DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 },
391 [DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 },
392 [DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 },
393 [DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 },
394 [DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 },
395 [DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 },
396 [DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 },
397 [DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 },
398 [DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 },
399 [DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 },
400 [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 },
401 [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 },
402 [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, 13 },
403 [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, 14 },
404 [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, 15 },
405 [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, 16 },
455 [DMACH_XD0] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 0), },
456 [DMACH_XD1] = { S3C24XX_DMA_AHB, true, S3C24XX_DMA_CHANREQ(0, 1), },
462 [DMACH_SPI0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 1), },
463 [DMACH_SPI1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 3), },
464 [DMACH_UART0] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 0), },
465 [DMACH_UART1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(1, 1), },
466 [DMACH_UART2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(0, 3), },
467 [DMACH_TIMER] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(3, 0) |
471 [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(2, 1) |
474 [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 0) |
477 [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 0) |
480 [DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(5, 1) |
483 [DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(6, 2) |
486 [DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 0), },
487 [DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 1), },
488 [DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 2), },
489 [DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
557 [DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
558 [DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 },
560 [DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 },
561 [DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 },
562 [DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 },
563 [DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 },
564 [DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 },
565 [DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 },
566 [DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 },
567 [DMACH_UART3] = { S3C24XX_DMA_APB, true, 25 },
568 [DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 },
569 [DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 },
570 [DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 },
571 [DMACH_UART3_SRC2] = { S3C24XX_DMA_APB, true, 26 },
572 [DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 },
573 [DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 },
574 [DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 },
575 [DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, 28 },
576 [DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, 27 },
577 [DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, 29 },