Lines Matching +full:irqs +full:- +full:reserved
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2003-2005 Simtec Electronics
11 /* we keep the first set of CPU IRQs out of the range of
83 #define IRQ_EINT_BIT(x) ((x) - IRQ_EINT4 + 4)
84 #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x)))
89 /* IRQs for the interal UARTs, and ADC
111 /* extra irqs for s3c2412 */
137 /* second interrupt-register of s3c2416/s3c2450 */
149 /* extra irqs for s3c2440 */
156 /* irqs for s3c2443 */
162 #define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */