Lines Matching +full:lcd +full:- +full:controller
1 /* SPDX-License-Identifier: GPL-2.0 */
8 * LCD Controller Registers and Bits Definitions
10 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */
11 #define LCCR1 (0x004) /* LCD Controller Control Register 1 */
12 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */
13 #define LCCR3 (0x00C) /* LCD Controller Control Register 3 */
14 #define LCCR4 (0x010) /* LCD Controller Control Register 4 */
15 #define LCCR5 (0x014) /* LCD Controller Control Register 5 */
16 #define LCSR (0x038) /* LCD Controller Status Register 0 */
17 #define LCSR1 (0x034) /* LCD Controller Status Register 1 */
18 #define LIIDR (0x03C) /* LCD Controller Interrupt ID Register */
59 #define LCCR0_ENB (1 << 0) /* LCD Controller enable */
67 #define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */
75 #define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */
76 #define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */
77 #define LCCR0_DIS (1 << 10) /* LCD Disable */
78 #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
83 #define LCCR0_LCDT (1 << 22) /* LCD panel type */
89 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
90 #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL))
93 #define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW))
95 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */
96 #define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW))
98 #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
99 #define LCCR1_BegLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_BLW))
101 #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
102 #define LCCR2_DisHght(Line) (((Line) - 1) << FShft (LCCR2_LPP))
104 #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */
105 #define LCCR2_VrtSnchWdth(Tln) (((Tln) - 1) << FShft (LCCR2_VSW))
107 #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */
110 #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */
118 #define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */
119 #define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */
143 #define LCSR_LDD (1 << 0) /* LCD Disable Done */
160 #define LCSR1_SOF(x) (1 << ((x) - 1)) /* Start of Frame Status */
165 #define OVLxC1_PPL(x) ((((x) - 1) & 0x3ff) << 0) /* Pixels Per Line */
166 #define OVLxC1_LPO(x) ((((x) - 1) & 0x3ff) << 10) /* Number of Lines */