Lines Matching +full:up +full:- +full:counter

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * linux/arch/arm/mach-omap2/sram242x.S
9  * Richard Woodruff <r-woodruff2@ti.com>
31 	stmfd	sp!, {r0 - r12, lr}	@ save registers on stack
39 	str	r3, [r2]		@ go to L1-freq operation
42 	mov r9, #0x1			@ set up for L1 voltage call
61 	/* voltage shift up */
62 	mov r9, #0x0			@ shift back to L0-voltage
65 	/* frequency shift up */
67 	str	r3, [r2]		@ go to L0-freq operation
80 	/* set up for return, DDR should be good */
81 	str r10, [r0]			@ write dll_status and return counter
82 	ldmfd	sp!, {r0 - r12, pc}	@ restore regs and return
93 	 * shift up or down voltage, use R9 as input to tell level.
94 	 * wait for it to finish, use 32k sync counter, 1tick=31uS.
101 	orr	r5, r5, r9		@ bulld value for L0/L1-volt operation.
102 	str	r5, [r4]		@ set up for change.
107 	ldr	r3, omap242x_sdi_timer_32ksynct_cr	@ get addr of counter
112 	cmp	r5, r7			@ time up?
113 	bhi	volt_delay		@ not yet->branch
127 	.word	. - omap242x_sram_ddr_init
136 	stmfd	sp!, {r0 - r10, lr}	@ save registers on stack
146 	movne	r9, #0x0		@ if up set flag up for pre up, hi volt
185 	ldmfd	sp!, {r0 - r10, pc}	@ restore regs and return
188      * shift up or down voltage, use R9 as input to tell level.
189      *	wait for it to finish, use 32k sync counter, 1tick=31uS.
196 	orr	r8, r8, r9		@ bulld value for L0/L1-volt operation.
197 	str	r8, [r10]		@ set up for change.
202 	ldr	r10, omap242x_srs_timer_32ksynct	@ get addr of counter
207 	cmp	r8, r7			@ time up?
208 	bhi	volt_delay_c		@ not yet->branch
225 	.word	. - omap242x_sram_reprogram_sdrc
232 	stmfd	sp!, {r0-r12, lr}	@ regs to stack
301 	ldmfd	sp!, {r0-r12, pc}	@ restore regs and return
317 	.word	. - omap242x_sram_set_prcm