Lines Matching +full:- +full:sram

1 // SPDX-License-Identifier: GPL-2.0-only
4  * OMAP SRAM detection and management
9  * Copyright (C) 2009-2012 Texas Instruments
10  * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
28 #include "sram.h"
47 #define ROUND_DOWN(value,boundary)	((value) & (~((boundary)-1)))
55  * SRAM varies.  The default accessible size for all device types is 2k. A GP
64 			writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */  in is_sram_locked()
65 			writel_relaxed(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */  in is_sram_locked()
66 			writel_relaxed(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */  in is_sram_locked()
69 			writel_relaxed(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */  in is_sram_locked()
70 			writel_relaxed(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */  in is_sram_locked()
71 			writel_relaxed(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */  in is_sram_locked()
81  * The amount of SRAM depends on the core type.
82  * Note that we cannot try to test for SRAM here because writes
83  * to secure SRAM will hang the system. Also the SRAM is not
118  * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
126 		 * SRAM must be marked as non-cached on OMAP3 since the  in omap2_map_sram()
127 		 * CORE DPLL M2 divider change code (in SRAM) runs with the  in omap2_map_sram()