Lines Matching +full:no +full:- +full:tick +full:- +full:in +full:- +full:suspend
2 * linux/arch/arm/mach-omap1/pm.c
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
38 #include <linux/suspend.h>
57 #include <linux/omap-dma.h>
58 #include <clocksource/timer-ti-dm.h>
91 return -EINVAL; in idle_store()
107 * a clock tick interrupt . .
163 * Turn off all interrupts except GPIO bank 1, L1-2nd level cascade, in omap_pm_wakeup_setup()
199 /* New IRQ agreement, recalculate in cascade order */ in omap_pm_wakeup_setup()
281 /* (Step 3 removed - we now allow deep sleep by default) */ in omap1_pm_suspend()
321 * assembly code in internal SRAM. in omap1_pm_suspend()
400 * Re-enable interrupts in omap1_pm_suspend()
408 printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n", in omap1_pm_suspend()
459 "ARM_CKCTL_REG: 0x%-8x \n" in omap_pm_debug_show()
460 "ARM_IDLECT1_REG: 0x%-8x \n" in omap_pm_debug_show()
461 "ARM_IDLECT2_REG: 0x%-8x \n" in omap_pm_debug_show()
462 "ARM_IDLECT3_REG: 0x%-8x \n" in omap_pm_debug_show()
463 "ARM_EWUPCT_REG: 0x%-8x \n" in omap_pm_debug_show()
464 "ARM_RSTCT1_REG: 0x%-8x \n" in omap_pm_debug_show()
465 "ARM_RSTCT2_REG: 0x%-8x \n" in omap_pm_debug_show()
466 "ARM_SYSST_REG: 0x%-8x \n" in omap_pm_debug_show()
467 "ULPD_IT_STATUS_REG: 0x%-4x \n" in omap_pm_debug_show()
468 "ULPD_CLOCK_CTRL_REG: 0x%-4x \n" in omap_pm_debug_show()
469 "ULPD_SOFT_REQ_REG: 0x%-4x \n" in omap_pm_debug_show()
470 "ULPD_DPLL_CTRL_REG: 0x%-4x \n" in omap_pm_debug_show()
471 "ULPD_STATUS_REQ_REG: 0x%-4x \n" in omap_pm_debug_show()
472 "ULPD_POWER_CTRL_REG: 0x%-4x \n", in omap_pm_debug_show()
490 "MPUI7XX_CTRL_REG 0x%-8x \n" in omap_pm_debug_show()
491 "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" in omap_pm_debug_show()
492 "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
493 "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
494 "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
495 "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", in omap_pm_debug_show()
504 "MPUI1510_CTRL_REG 0x%-8x \n" in omap_pm_debug_show()
505 "MPUI1510_DSP_STATUS_REG: 0x%-8x \n" in omap_pm_debug_show()
506 "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
507 "MPUI1510_DSP_API_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
508 "MPUI1510_SDRAM_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
509 "MPUI1510_EMIFS_CONFIG_REG: 0x%-8x \n", in omap_pm_debug_show()
518 "MPUI1610_CTRL_REG 0x%-8x \n" in omap_pm_debug_show()
519 "MPUI1610_DSP_STATUS_REG: 0x%-8x \n" in omap_pm_debug_show()
520 "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
521 "MPUI1610_DSP_API_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
522 "MPUI1610_SDRAM_CONFIG_REG: 0x%-8x \n" in omap_pm_debug_show()
523 "MPUI1610_EMIFS_CONFIG_REG: 0x%-8x \n", in omap_pm_debug_show()
549 * omap_pm_prepare - Do preliminary suspend work.
554 /* We cannot sleep in idle until we have resumed */ in omap_pm_prepare()
561 * omap_pm_enter - Actually enter a sleep state.
574 return -EINVAL; in omap_pm_enter()
582 * omap_pm_finish - Finish up suspend sequence.
614 return -ENODEV; in omap_pm_init()
619 pr_info("OMAP1 PM: sleep states in idle disabled due to no 32KiHz timer\n"); in omap_pm_init()
622 pr_info("OMAP1 PM: sleep states in idle disabled due to no DMTIMER support\n"); in omap_pm_init()
627 pr_info("OMAP1 PM: sleep states in idle enabled\n"); in omap_pm_init()
633 * These routines need to be in SRAM as that's the only in omap_pm_init()
649 return -ENODEV; in omap_pm_init()
662 /* Program new power ramp-up time in omap_pm_init()
663 * (0 for most boards since we don't lower voltage when in deep sleep) in omap_pm_init()
667 /* Setup ULPD POWER_CTRL_REG - enter deep sleep whenever possible */ in omap_pm_init()