Lines Matching +full:0 +full:x50000
15 #define APB_PHYS_BASE 0xd4000000
16 #define APB_VIRT_BASE IOMEM(0xfe000000)
17 #define APB_PHYS_SIZE 0x00200000
19 #define AXI_PHYS_BASE 0xd4200000
20 #define AXI_VIRT_BASE IOMEM(0xfe200000)
21 #define AXI_PHYS_SIZE 0x00200000
23 #define PGU_PHYS_BASE 0xe0000000
24 #define PGU_VIRT_BASE IOMEM(0xfe400000)
25 #define PGU_PHYS_SIZE 0x00100000
27 /* Static Memory Controller - Chip Select 0 and 1 */
28 #define SMC_CS0_PHYS_BASE 0x80000000
29 #define SMC_CS0_PHYS_SIZE 0x10000000
30 #define SMC_CS1_PHYS_BASE 0x90000000
31 #define SMC_CS1_PHYS_SIZE 0x10000000
33 #define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)
36 #define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000)
39 #define MPMU_VIRT_BASE (APB_VIRT_BASE + 0x50000)
42 #define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00)