38 static struct reset_control *meson_smp_get_core_reset(int cpu)  in meson_smp_get_core_reset()  argument
40 	struct device_node *np = of_get_cpu_node(cpu, 0);  in meson_smp_get_core_reset()
45 static void meson_smp_set_cpu_ctrl(int cpu, bool on_off)  in meson_smp_set_cpu_ctrl()  argument
50 		val |= BIT(cpu);  in meson_smp_set_cpu_ctrl()
52 		val &= ~BIT(cpu);  in meson_smp_set_cpu_ctrl()
114 static void meson_smp_begin_secondary_boot(unsigned int cpu)  in meson_smp_begin_secondary_boot()  argument
123 	       sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu));  in meson_smp_begin_secondary_boot()
129 	scu_cpu_power_enable(scu_base, cpu);  in meson_smp_begin_secondary_boot()
132 static int meson_smp_finalize_secondary_boot(unsigned int cpu)  in meson_smp_finalize_secondary_boot()  argument
137 	while (readl(sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu))) {  in meson_smp_finalize_secondary_boot()
140 			       cpu);  in meson_smp_finalize_secondary_boot()
146 	       sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu));  in meson_smp_finalize_secondary_boot()
148 	meson_smp_set_cpu_ctrl(cpu, true);  in meson_smp_finalize_secondary_boot()
153 static int meson8_smp_boot_secondary(unsigned int cpu,  in meson8_smp_boot_secondary()  argument
159 	rstc = meson_smp_get_core_reset(cpu);  in meson8_smp_boot_secondary()
161 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8_smp_boot_secondary()
165 	meson_smp_begin_secondary_boot(cpu);  in meson8_smp_boot_secondary()
170 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
176 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0);  in meson8_smp_boot_secondary()
178 		pr_err("Couldn't wake up CPU%d\n", cpu);  in meson8_smp_boot_secondary()
185 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_boot_secondary()
188 		pr_err("Error when disabling isolation of CPU%d\n", cpu);  in meson8_smp_boot_secondary()
195 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
199 	ret = meson_smp_finalize_secondary_boot(cpu);  in meson8_smp_boot_secondary()
209 static int meson8b_smp_boot_secondary(unsigned int cpu,  in meson8b_smp_boot_secondary()  argument
216 	rstc = meson_smp_get_core_reset(cpu);  in meson8b_smp_boot_secondary()
218 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
222 	meson_smp_begin_secondary_boot(cpu);  in meson8b_smp_boot_secondary()
226 				 MESON_CPU_PWR_A9_CNTL0_M(cpu), 0);  in meson8b_smp_boot_secondary()
228 		pr_err("Couldn't power up CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
237 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
243 				 MESON_CPU_PWR_A9_MEM_PD0_M(cpu), 0);  in meson8b_smp_boot_secondary()
245 		pr_err("Couldn't power up the memory for CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
251 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0);  in meson8b_smp_boot_secondary()
253 		pr_err("Couldn't wake up CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
260 				       val & MESON_CPU_PWR_A9_CNTL1_ST(cpu),  in meson8b_smp_boot_secondary()
263 		pr_err("Timeout while polling PMU for CPU%d status\n", cpu);  in meson8b_smp_boot_secondary()
268 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_boot_secondary()
271 		pr_err("Error when disabling isolation of CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
278 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
282 	ret = meson_smp_finalize_secondary_boot(cpu);  in meson8b_smp_boot_secondary()
293 static void meson8_smp_cpu_die(unsigned int cpu)  in meson8_smp_cpu_die()  argument
295 	meson_smp_set_cpu_ctrl(cpu, false);  in meson8_smp_cpu_die()
308 static int meson8_smp_cpu_kill(unsigned int cpu)  in meson8_smp_cpu_kill()  argument
315 		power_mode = scu_get_cpu_power_mode(scu_base, cpu);  in meson8_smp_cpu_kill()
325 		       cpu);  in meson8_smp_cpu_kill()
332 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8_smp_cpu_kill()
335 		pr_err("Error when enabling isolation for CPU%d\n", cpu);  in meson8_smp_cpu_kill()
343 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0x3);  in meson8_smp_cpu_kill()
345 		pr_err("Couldn't change sleep status of CPU%d\n", cpu);  in meson8_smp_cpu_kill()
352 static int meson8b_smp_cpu_kill(unsigned int cpu)  in meson8b_smp_cpu_kill()  argument
357 		power_mode = scu_get_cpu_power_mode(scu_base, cpu);  in meson8b_smp_cpu_kill()
367 		       cpu);  in meson8b_smp_cpu_kill()
375 				 MESON_CPU_PWR_A9_CNTL0_M(cpu), 0x3);  in meson8b_smp_cpu_kill()
377 		pr_err("Couldn't power down CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
382 	ret = regmap_update_bits(pmu, MESON_CPU_AO_RTI_PWR_A9_CNTL0, BIT(cpu),  in meson8b_smp_cpu_kill()
385 		pr_err("Error when enabling isolation for CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
393 				 MESON_CPU_PWR_A9_CNTL1_M(cpu), 0x3);  in meson8b_smp_cpu_kill()
395 		pr_err("Couldn't change sleep status of CPU%d\n", cpu);  in meson8b_smp_cpu_kill()
401 				 MESON_CPU_PWR_A9_MEM_PD0_M(cpu), 0xf);  in meson8b_smp_cpu_kill()
403 		pr_err("Couldn't power down the memory of CPU%d\n", cpu);  in meson8b_smp_cpu_kill()