Lines Matching +full:u +full:- +full:boot +full:- +full:spl

1 // SPDX-License-Identifier: GPL-2.0
5 // Based on arch/arm/mach-vexpress/dcscb.c
7 #include <linux/arm-cci.h>
12 #include <linux/soc/samsung/exynos-regs-pmu.h>
64 	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);  in exynos_cpu_powerup()
67 		return -EINVAL;  in exynos_cpu_powerup()
89 				timeout--;  in exynos_cpu_powerup()
94 				pr_err("cpu %u cluster %u powerup failed\n",  in exynos_cpu_powerup()
97 				return -ETIMEDOUT;  in exynos_cpu_powerup()
110 	pr_debug("%s: cluster %u\n", __func__, cluster);  in exynos_cluster_powerup()
112 		return -EINVAL;  in exynos_cluster_powerup()
122 	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);  in exynos_cpu_powerdown_prepare()
130 	pr_debug("%s: cluster %u\n", __func__, cluster);  in exynos_cluster_powerdown_prepare()
145 		 * On the Cortex-A15 we need to disable  in exynos_cluster_cache_disable()
159 	 * Disable cluster-level coherency by masking  in exynos_cluster_cache_disable()
170 	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);  in exynos_wait_for_powerdown()
175 	while (tries--) {  in exynos_wait_for_powerdown()
183 	return -ETIMEDOUT; /* timeout */  in exynos_wait_for_powerdown()
204  * Enable cluster-level coherency, in preparation for turning on the MMU.
223 	 * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr  in exynos_mcpm_setup_entry_point()
225 	 * mcpm_entry_point(). This is done during both secondary boot-up as  in exynos_mcpm_setup_entry_point()
245 		return -ENODEV;  in exynos_mcpm_init()
249 		return -ENODEV;  in exynos_mcpm_init()
252 			"samsung,exynos4210-sysram-ns");  in exynos_mcpm_init()
254 		return -ENODEV;  in exynos_mcpm_init()
259 		pr_err("failed to map non-secure iRAM base address\n");  in exynos_mcpm_init()
260 		return -ENOMEM;  in exynos_mcpm_init()