1 // SPDX-License-Identifier: GPL-2.0
3  *  linux/arch/arm/mach-ebsa110/isamem.c
8  * in the way it handles accesses to odd IO ports on 16-bit devices.  These
9  * devices have their D0-D15 lines connected to the processors D0-D15 lines.
10  * Since they expect all byte IO operations to be performed on D0-D7, and the
11  * StrongARM expects to transfer the byte to these odd addresses on D8-D15,
14  * The trick employed here is to use long word stores to odd address -1.  The
16  * peripherals address bus, thereby accessing the odd IO port.  Meanwhile, the
17  * StrongARM transfers its data on D0-D7 as expected.
19  * Things get more interesting on the pass-1 EBSA110 - the PCMCIA controller
21  * Luckily, the work-around for this is not too horrible.  See
38 	 *        +---------+---------+---------+---------+---------+---------+  in __isamem_convert_addr()
39 	 * PCMCIA | 2 2 2 2 | 1 1 1 1 | 1 1 1 1 | 1 1     |         |         |  in __isamem_convert_addr()
40 	 *        | 3 2 1 0 | 9 8 7 6 | 5 4 3 2 | 1 0 9 8 | 7 6 5 4 | 3 2 1 0 |  in __isamem_convert_addr()
41 	 *        +---------+---------+---------+---------+---------+---------+  in __isamem_convert_addr()
42 	 *  CPU   | 2 2 2 2 | 2 1 1 1 | 1 1 1 1 | 1 1 1   |         |         |  in __isamem_convert_addr()
43 	 *        | 4 3 2 1 | 0 9 9 8 | 7 6 5 4 | 3 2 0 9 | 8 7 6 5 | 4 3 2 x |  in __isamem_convert_addr()
44 	 *        +---------+---------+---------+---------+---------+---------+  in __isamem_convert_addr()
47 	 *	0x*10000 -> 0x*1ffff  in __isamem_convert_addr()
48 	 *	0x*70000 -> 0x*7ffff  in __isamem_convert_addr()
49 	 *	0x*90000 -> 0x*9ffff  in __isamem_convert_addr()
50 	 *	0x*f0000 -> 0x*fffff  in __isamem_convert_addr()
52 	ret  = (a & 0xf803fe) << 1;  in __isamem_convert_addr()
57 	if ((a & 0x20000) == (a & 0x40000) >> 1)  in __isamem_convert_addr()
72 	if ((unsigned long)addr & 1)  in __readb()
83 	if ((unsigned long)addr & 1)  in __readw()
110 	BUG_ON((unsigned long)addr & 1);  in readsw()
130 	if ((unsigned long)addr & 1)  in __writeb()
140 	if ((unsigned long)addr & 1)  in __writew()
165 	BUG_ON((unsigned long)addr & 1);  in writesw()
185  * --------------------------------------------------------
187  * f0000fe0 - f0000ffc	3f8 - 3ff  ttyS0
188  * f0000e60 - f0000e64	398 - 399
189  * f0000de0 - f0000dfc	378 - 37f  lp0
190  * f0000be0 - f0000bfc	2f8 - 2ff  ttyS1
192  * Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
193  * --------------------------------------------------------
196  * f00007c0 - f00007c1	3e0 - 3e1  pcmcia
198  * f0000440 - f000046c  220 - 236  eth0
207  * We're addressing an 8 or 16-bit peripheral which tranfers
210 u8 __inb8(unsigned int port)  in __inb8()  argument
217 	if (SUPERIO_PORT(port))  in __inb8()
218 		ret = __raw_readb((void __iomem *)ISAIO_BASE + (port << 2));  in __inb8()
220 		void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);  in __inb8()
225 		if (port & 1)  in __inb8()
234  * We're addressing a 16-bit peripheral which transfers odd
237 u8 __inb16(unsigned int port)  in __inb16()  argument
244 	if (SUPERIO_PORT(port))  in __inb16()
245 		offset = port << 2;  in __inb16()
247 		offset = (port & ~1) << 1 | (port & 1);  in __inb16()
252 u16 __inw(unsigned int port)  in __inw()  argument
259 	if (SUPERIO_PORT(port))  in __inw()
260 		offset = port << 2;  in __inw()
262 		offset = port << 1;  in __inw()
263 		BUG_ON(port & 1);  in __inw()
269  * Fake a 32-bit read with two 16-bit reads.  Needed for 3c589.
271 u32 __inl(unsigned int port)  in __inl()  argument
275 	if (SUPERIO_PORT(port) || port & 3)  in __inl()
278 	a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);  in __inl()
288 void __outb8(u8 val, unsigned int port)  in __outb8()  argument
293 	if (SUPERIO_PORT(port))  in __outb8()
294 		__raw_writeb(val, (void __iomem *)ISAIO_BASE + (port << 2));  in __outb8()
296 		void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);  in __outb8()
301 		if (port & 1)  in __outb8()
308 void __outb16(u8 val, unsigned int port)  in __outb16()  argument
315 	if (SUPERIO_PORT(port))  in __outb16()
316 		offset = port << 2;  in __outb16()
318 		offset = (port & ~1) << 1 | (port & 1);  in __outb16()
323 void __outw(u16 val, unsigned int port)  in __outw()  argument
330 	if (SUPERIO_PORT(port))  in __outw()
331 		offset = port << 2;  in __outw()
333 		offset = port << 1;  in __outw()
334 		BUG_ON(port & 1);  in __outw()
339 void __outl(u32 val, unsigned int port)  in __outl()  argument
349 void outsb(unsigned int port, const void *from, int len)  in outsb()  argument
353 	if (SUPERIO_PORT(port))  in outsb()
354 		off = port << 2;  in outsb()
356 		off = (port & ~1) << 1;  in outsb()
357 		if (port & 1)  in outsb()
364 void insb(unsigned int port, void *from, int len)  in insb()  argument
368 	if (SUPERIO_PORT(port))  in insb()
369 		off = port << 2;  in insb()
371 		off = (port & ~1) << 1;  in insb()
372 		if (port & 1)  in insb()
382 void outsw(unsigned int port, const void *from, int len)  in outsw()  argument
386 	if (SUPERIO_PORT(port))  in outsw()
387 		off = port << 2;  in outsw()
389 		off = (port & ~1) << 1;  in outsw()
390 		if (port & 1)  in outsw()
397 void insw(unsigned int port, void *from, int len)  in insw()  argument
401 	if (SUPERIO_PORT(port))  in insw()
402 		off = port << 2;  in insw()
404 		off = (port & ~1) << 1;  in insw()
405 		if (port & 1)  in insw()
416  * We implement these as 16-bit insw/outsw, mainly for
419 void outsl(unsigned int port, const void *from, int len)  in outsl()  argument
421 	u32 off = port << 1;  in outsl()
423 	if (SUPERIO_PORT(port) || port & 3)  in outsl()
426 	__raw_writesw((void __iomem *)ISAIO_BASE + off, from, len << 1);  in outsl()
429 void insl(unsigned int port, void *from, int len)  in insl()  argument
431 	u32 off = port << 1;  in insl()
433 	if (SUPERIO_PORT(port) || port & 3)  in insl()
436 	__raw_readsw((void __iomem *)ISAIO_BASE + off, from, len << 1);  in insl()