Lines Matching refs:MUX_CFG
104 MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true)
105 MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true)
106 MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
108 MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
110 MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
111 MUX_CFG(DM644X, AEAW0, 0, 0, 1, 0, true)
112 MUX_CFG(DM644X, AEAW1, 0, 1, 1, 0, true)
113 MUX_CFG(DM644X, AEAW2, 0, 2, 1, 0, true)
114 MUX_CFG(DM644X, AEAW3, 0, 3, 1, 0, true)
115 MUX_CFG(DM644X, AEAW4, 0, 4, 1, 0, true)
117 MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false)
119 MUX_CFG(DM644X, I2C, 1, 7, 1, 1, false)
121 MUX_CFG(DM644X, MCBSP, 1, 10, 1, 1, false)
123 MUX_CFG(DM644X, UART1, 1, 1, 1, 1, true)
124 MUX_CFG(DM644X, UART2, 1, 2, 1, 1, true)
126 MUX_CFG(DM644X, PWM0, 1, 4, 1, 1, false)
128 MUX_CFG(DM644X, PWM1, 1, 5, 1, 1, false)
130 MUX_CFG(DM644X, PWM2, 1, 6, 1, 1, false)
132 MUX_CFG(DM644X, VLYNQEN, 0, 15, 1, 1, false)
133 MUX_CFG(DM644X, VLSCREN, 0, 14, 1, 1, false)
134 MUX_CFG(DM644X, VLYNQWD, 0, 12, 3, 3, false)
136 MUX_CFG(DM644X, EMACEN, 0, 31, 1, 1, true)
138 MUX_CFG(DM644X, GPIO3V, 0, 31, 1, 0, true)
140 MUX_CFG(DM644X, GPIO0, 0, 24, 1, 0, true)
141 MUX_CFG(DM644X, GPIO3, 0, 25, 1, 0, false)
142 MUX_CFG(DM644X, GPIO43_44, 1, 7, 1, 0, false)
143 MUX_CFG(DM644X, GPIO46_47, 0, 22, 1, 0, true)
145 MUX_CFG(DM644X, RGB666, 0, 22, 1, 1, true)
147 MUX_CFG(DM644X, LOEEN, 0, 24, 1, 1, true)
148 MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false)