Lines Matching refs:rv
45 #define checkuart(rp, rv, family_id, family) \ argument
49 cmp rp, rv ; \
55 .macro addruart, rp, rv, tmp
57 ldr \rv, [\rp] @ linked addr is stored there
58 sub \rv, \rv, \rp @ offset between the two
60 sub \tmp, \rp, \rv @ actual brcmstb_uart_config
64 mov \rv, #0 @ yes; record init is done
65 str \rv, [\tmp]
68 mrc p15, 0, \rv, c0, c0, 0 @ get Main ID register
70 and \rv, \rv, \rp
72 cmp \rv, \rp
76 mrc p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
77 ands \rv, \rv, #REG_PHYS_BASE
82 ldr \rv, [\rp, #0] @ get register contents
83 ARM_BE8( rev \rv, \rv )
84 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
87 20: checkuart(\rp, \rv, 0x33900000, 3390)
88 21: checkuart(\rp, \rv, 0x72160000, 7216)
89 22: checkuart(\rp, \rv, 0x07216400, 72164)
90 23: checkuart(\rp, \rv, 0x07216500, 72165)
91 24: checkuart(\rp, \rv, 0x72500000, 7250)
92 25: checkuart(\rp, \rv, 0x72550000, 7255)
93 26: checkuart(\rp, \rv, 0x72600000, 7260)
94 27: checkuart(\rp, \rv, 0x72680000, 7268)
95 28: checkuart(\rp, \rv, 0x72710000, 7271)
96 29: checkuart(\rp, \rv, 0x72780000, 7278)
97 30: checkuart(\rp, \rv, 0x73640000, 7364)
98 31: checkuart(\rp, \rv, 0x73660000, 7366)
99 32: checkuart(\rp, \rv, 0x07437100, 74371)
100 33: checkuart(\rp, \rv, 0x74390000, 7439)
101 34: checkuart(\rp, \rv, 0x74450000, 7445)
113 92: and \rv, \rp, #0xffffff @ offset within 16MB section
114 add \rv, \rv, #REG_VIRT_BASE
115 str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
125 ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt