Lines Matching +full:arm926ej +full:- +full:s
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "simple-bus";
38 interrupt-parent = <&intc0>;
40 intc0: interrupt-controller@d8140000 {
41 compatible = "via,vt8500-intc";
42 interrupt-controller;
44 #interrupt-cells = <1>;
48 intc1: interrupt-controller@d8150000 {
49 compatible = "via,vt8500-intc";
50 interrupt-controller;
51 #interrupt-cells = <1>;
57 compatible = "wm,wm8650-pinctrl";
59 interrupt-controller;
60 #interrupt-cells = <2>;
61 gpio-controller;
62 #gpio-cells = <2>;
66 compatible = "via,vt8500-pmc";
70 #address-cells = <1>;
71 #size-cells = <0>;
74 #clock-cells = <0>;
75 compatible = "fixed-clock";
76 clock-frequency = <25000000>;
80 #clock-cells = <0>;
81 compatible = "fixed-clock";
82 clock-frequency = <24000000>;
86 #clock-cells = <0>;
87 compatible = "wm,wm8650-pll-clock";
93 #clock-cells = <0>;
94 compatible = "wm,wm8650-pll-clock";
100 #clock-cells = <0>;
101 compatible = "wm,wm8650-pll-clock";
107 #clock-cells = <0>;
108 compatible = "wm,wm8650-pll-clock";
114 #clock-cells = <0>;
115 compatible = "wm,wm8650-pll-clock";
121 #clock-cells = <0>;
122 compatible = "via,vt8500-device-clock";
124 divisor-reg = <0x300>;
128 #clock-cells = <0>;
129 compatible = "via,vt8500-device-clock";
131 divisor-reg = <0x304>;
135 #clock-cells = <0>;
136 compatible = "via,vt8500-device-clock";
138 divisor-reg = <0x320>;
142 #clock-cells = <0>;
143 compatible = "via,vt8500-device-clock";
145 divisor-reg = <0x310>;
149 #clock-cells = <0>;
150 compatible = "via,vt8500-device-clock";
152 enable-reg = <0x250>;
153 enable-bit = <1>;
157 #clock-cells = <0>;
158 compatible = "via,vt8500-device-clock";
160 enable-reg = <0x250>;
161 enable-bit = <2>;
165 #clock-cells = <0>;
166 compatible = "via,vt8500-device-clock";
168 divisor-reg = <0x328>;
169 divisor-mask = <0x3f>;
170 enable-reg = <0x254>;
171 enable-bit = <18>;
177 compatible = "via,vt8500-timer";
183 compatible = "via,vt8500-ehci";
189 compatible = "platform-uhci";
195 compatible = "wm,wm8505-sdhc";
199 bus-width = <4>;
200 sdon-inverted;
204 compatible = "wm,wm8505-fb";
209 compatible = "wm,prizm-ge-rops";
214 compatible = "via,vt8500-uart";
222 compatible = "via,vt8500-uart";
230 compatible = "via,vt8500-rtc";
236 compatible = "via,vt8500-rhine";