Lines Matching +full:arm926ej +full:- +full:s

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * vt8500.dtsi - Device tree file for VIA VT8500 SoC
9 	#address-cells = <1>;
10 	#size-cells = <1>;
14 		#address-cells = <0>;
15 		#size-cells = <0>;
19 			compatible = "arm,arm926ej-s";
36 		#address-cells = <1>;
37 		#size-cells = <1>;
38 		compatible = "simple-bus";
40 		interrupt-parent = <&intc>;
42 		intc: interrupt-controller@d8140000 {
43 			compatible = "via,vt8500-intc";
44 			interrupt-controller;
46 			#interrupt-cells = <1>;
50 			compatible = "via,vt8500-pinctrl";
52 			interrupt-controller;
53 			#interrupt-cells = <2>;
54 			gpio-controller;
55 			#gpio-cells = <2>;
59 			compatible = "via,vt8500-pmc";
63 				#address-cells = <1>;
64 				#size-cells = <0>;
67 					#clock-cells = <0>;
68 					compatible = "fixed-clock";
69 					clock-frequency = <24000000>;
73 					#clock-cells = <0>;
74 					compatible = "via,vt8500-device-clock";
76 					enable-reg = <0x250>;
77 					enable-bit = <1>;
81 					#clock-cells = <0>;
82 					compatible = "via,vt8500-device-clock";
84 					enable-reg = <0x250>;
85 					enable-bit = <2>;
89 					#clock-cells = <0>;
90 					compatible = "via,vt8500-device-clock";
92 					enable-reg = <0x250>;
93 					enable-bit = <3>;
97 					#clock-cells = <0>;
98 					compatible = "via,vt8500-device-clock";
100 					enable-reg = <0x250>;
101 					enable-bit = <4>;
107 			compatible = "via,vt8500-timer";
113 			compatible = "via,vt8500-ehci";
119 			compatible = "platform-uhci";
125 			compatible = "via,vt8500-fb";
131 			compatible = "wm,prizm-ge-rops";
136 			compatible = "via,vt8500-uart";
144 			compatible = "via,vt8500-uart";
152 			compatible = "via,vt8500-uart";
160 			compatible = "via,vt8500-uart";
168 			compatible = "via,vt8500-rtc";
174 			compatible = "via,vt8500-rhine";