Lines Matching +full:0 +full:x40066000
33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 offset = <0x0>;
47 mask = <0x1000>;
66 reg = <0x40000000 0x00070000>;
71 reg = <0x40001000 0x800>;
76 reg = <0x40001800 0x400>;
85 reg = <0x40018000 0x2000>,
86 <0x40024000 0x1000>,
87 <0x40025000 0x1000>;
100 reg = <0x40020000 0x4000>;
110 reg = <0x40027000 0x1000>;
114 dmas = <&edma0 0 2>,
115 <&edma0 0 3>;
122 reg = <0x40028000 0x1000>;
126 dmas = <&edma0 0 4>,
127 <&edma0 0 5>;
134 reg = <0x40029000 0x1000>;
138 dmas = <&edma0 0 6>,
139 <&edma0 0 7>;
146 reg = <0x4002a000 0x1000>;
150 dmas = <&edma0 0 8>,
151 <&edma0 0 9>;
158 #size-cells = <0>;
160 reg = <0x4002c000 0x1000>;
173 #size-cells = <0>;
175 reg = <0x4002d000 0x1000>;
188 reg = <0x4002f000 0x1000>;
192 <&clks 0>, <&clks 0>;
195 dmas = <&edma0 0 17>,
196 <&edma0 0 16>;
202 reg = <0x40030000 0x1000>;
206 <&clks 0>, <&clks 0>;
209 dmas = <&edma0 0 19>,
210 <&edma0 0 18>;
216 reg = <0x40031000 0x1000>;
220 <&clks 0>, <&clks 0>;
223 dmas = <&edma0 0 21>,
224 <&edma0 0 20>;
230 reg = <0x40032000 0x1000>;
234 <&clks 0>, <&clks 0>;
244 reg = <0x40037000 0x1000>;
253 reg = <0x40038000 0x1000>;
266 reg = <0x40039000 0x1000>;
278 reg = <0x4003b000 0x1000>;
290 reg = <0x4003d000 0x1000>;
298 reg = <0x4003e000 0x1000>;
307 #size-cells = <0>;
309 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
320 reg = <0x40048000 0x1000>;
325 reg = <0x40049000 0x1000 0x400ff000 0x40>;
331 gpio-ranges = <&iomuxc 0 0 32>;
336 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
342 gpio-ranges = <&iomuxc 0 32 32>;
347 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
353 gpio-ranges = <&iomuxc 0 64 32>;
358 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
364 gpio-ranges = <&iomuxc 0 96 32>;
369 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
375 gpio-ranges = <&iomuxc 0 128 7>;
380 reg = <0x40050000 0x400>;
385 reg = <0x40050800 0x400>;
394 reg = <0x40050c00 0x400>;
403 reg = <0x40058000 0x1200>;
414 #size-cells = <0>;
416 reg = <0x40066000 0x1000>;
420 dmas = <&edma0 0 50>,
421 <&edma0 0 51>;
428 #size-cells = <0>;
430 reg = <0x40067000 0x1000>;
434 dmas = <&edma0 0 52>,
435 <&edma0 0 53>;
442 reg = <0x4006b000 0x1000>;
450 reg = <0x40034000 0x800>;
454 fsl,usbmisc = <&usbmisc0 0>;
462 reg = <0x40034800 0x200>;
469 reg = <0x4006e000 0x1000>;
478 reg = <0x40080000 0x0007f000>;
484 reg = <0x40098000 0x2000>,
485 <0x400a1000 0x1000>,
486 <0x400a2000 0x1000>;
499 reg = <0x400a5000 0x1000>;
504 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
505 reg = <0x400a7000 0x2000>;
508 compatible = "fsl,sec-v4.0-mon-rtc-lp";
510 offset = <0x34>;
519 reg = <0x400a9000 0x1000>;
528 reg = <0x400aa000 0x1000>;
537 #size-cells = <0>;
539 reg = <0x400ac000 0x1000>;
544 dmas = <&edma1 0 10>,
545 <&edma1 0 11>;
552 #size-cells = <0>;
554 reg = <0x400ad000 0x1000>;
559 dmas = <&edma1 0 12>,
560 <&edma1 0 13>;
567 reg = <0x400bb000 0x1000>;
579 reg = <0x400b1000 0x1000>;
590 reg = <0x400b2000 0x1000>;
601 reg = <0x400b4000 0x800>;
605 fsl,usbmisc = <&usbmisc1 0>;
613 reg = <0x400b4800 0x200>;
620 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
633 #size-cells = <0>;
635 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
646 reg = <0x400cc000 1000>;
655 reg = <0x400cd000 1000>;
664 reg = <0x400d0000 0x1000>;
675 reg = <0x400d1000 0x1000>;
686 reg = <0x400d4000 0x4000>;
696 #size-cells = <0>;
698 reg = <0x400e0000 0x4000>;
707 #size-cells = <0>;
709 reg = <0x400e6000 0x1000>;
721 #size-cells = <0>;
723 reg = <0x400e7000 0x1000>;
734 compatible = "fsl,sec-v4.0";
737 reg = <0x400f0000 0x9000>;
738 ranges = <0 0x400f0000 0x9000>;
743 compatible = "fsl,sec-v4.0-job-ring";
744 reg = <0x1000 0x1000>;
749 compatible = "fsl,sec-v4.0-job-ring";
750 reg = <0x2000 0x1000>;