Lines Matching +full:vf610 +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
10 model = "ZII VF610 Development Board, Rev C";
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 pinctrl-0 = <&pinctrl_gpio_switch0>;
32 pinctrl-names = "default";
35 eeprom-length = <65536>;
36 interrupt-parent = <&gpio0>;
38 interrupt-controller;
39 #interrupt-cells = <2>;
42 #address-cells = <1>;
43 #size-cells = <0>;
50 fixed-link {
52 full-duplex;
59 phy-handle = <&switch0phy1>;
65 phy-handle = <&switch0phy2>;
71 phy-handle = <&switch0phy3>;
77 phy-handle = <&switch0phy4>;
83 phy-mode = "xaui";
89 #address-cells = <1>;
90 #size-cells = <0>;
94 interrupt-parent = <&switch0>;
100 interrupt-parent = <&switch0>;
106 interrupt-parent = <&switch0>;
112 interrupt-parent = <&switch0>;
121 #address-cells = <1>;
122 #size-cells = <0>;
126 pinctrl-0 = <&pinctrl_gpio_switch1>;
127 pinctrl-names = "default";
130 eeprom-length = <65536>;
131 interrupt-parent = <&gpio0>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
137 #address-cells = <1>;
138 #size-cells = <0>;
143 phy-handle = <&switch1phy1>;
149 phy-handle = <&switch1phy2>;
155 phy-handle = <&switch1phy3>;
161 phy-handle = <&switch1phy4>;
167 phy-mode = "1000base-x";
168 managed = "in-band-status";
175 phy-mode = "xaui";
180 #address-cells = <1>;
181 #size-cells = <0>;
185 interrupt-parent = <&switch1>;
191 interrupt-parent = <&switch1>;
197 interrupt-parent = <&switch1>;
203 interrupt-parent = <&switch1>;
212 #address-cells = <1>;
213 #size-cells = <0>;
220 i2c-bus = <&sff2_i2c>;
221 los-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
222 tx-disable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
228 i2c-bus = <&sff3_i2c>;
229 los-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
230 tx-disable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
235 bus-num = <0>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_dspi0>;
239 spi-num-chipselects = <2>;
242 compatible = "m25p128", "jedec,spi-nor";
243 #address-cells = <1>;
244 #size-cells = <1>;
246 spi-max-frequency = <1000000>;
249 atzb-rf-233@1 {
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctr_atzb_rf_233>;
255 spi-max-frequency = <7500000>;
258 interrupt-parent = <&gpio3>;
259 xtal-trim = /bits/ 8 <0x06>;
261 sleep-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
262 reset-gpio = <&gpio6 10 GPIO_ACTIVE_HIGH>;
264 fsl,spi-cs-sck-delay = <180>;
265 fsl,spi-sck-cs-delay = <250>;
274 * P1 - WE2_CMD
275 * P2 - WE2_CLK
277 gpio5: io-expander@18 {
280 gpio-controller;
281 #gpio-cells = <2>;
288 * I/O0 - ENET_SWR_EN
289 * I/O1 - ESW1_RESETn
290 * I/O2 - ARINC_RESET
291 * I/O3 - DD1_IO_RESET
292 * I/O4 - ESW2_RESETn
293 * I/O5 - ESW3_RESETn
294 * I/O6 - ESW4_RESETn
295 * I/O8 - TP909
296 * I/O9 - FEM_SEL
297 * I/O10 - WIFI_RESETn
298 * I/O11 - PHY_RSTn
299 * I/O12 - OPT1_SD
300 * I/O13 - OPT2_SD
301 * I/O14 - OPT1_TX_DIS
302 * I/O15 - OPT2_TX_DIS
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_sx1503_20>;
309 #gpio-cells = <2>;
310 #interrupt-cells = <2>;
312 interrupt-parent = <&gpio0>;
314 gpio-controller;
315 interrupt-controller;
322 * IO0 - WE1_CLK
323 * IO1 - WE1_CMD
325 gpio7: io-expander@22 {
328 gpio-controller;
329 #gpio-cells = <2>;
338 read-only;
345 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
346 pinctrl-names = "default";
347 #address-cells = <1>;
348 #size-cells = <0>;
350 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
352 i2c@0 {
353 #address-cells = <1>;
354 #size-cells = <0>;
358 sff2_i2c: i2c@1 {
359 #address-cells = <1>;
360 #size-cells = <0>;
364 sff3_i2c: i2c@2 {
365 #address-cells = <1>;
366 #size-cells = <0>;
370 i2c@3 {
371 #address-cells = <1>;
372 #size-cells = <0>;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_uart3>;
386 gpio-hog;
389 line-name = "sx1503-irq";
395 gpio-hog;
398 line-name = "eth0-intrp";
404 #address-cells = <1>;
405 #size-cells = <0>;
408 ethernet-phy@0 {
409 compatible = "ethernet-phy-ieee802.3-c22";
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_fec0_phy_int>;
414 interrupt-parent = <&gpio3>;
422 pinctr_atzb_rf_233: pinctrl-atzb-rf-233 {
430 pinctrl_sx1503_20: pinctrl-sx1503-20 {
443 pinctrl_mdio_mux: pinctrl-mdio-mux {
451 pinctrl_fec0_phy_int: pinctrl-fec0-phy-int {