Lines Matching +full:0 +full:x2c000000

16 	arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
55 reg = <0x80000000 0x40000000>;
63 /* Chipselect 2 is physically at 0x18000000 */
67 reg = <0x18000000 0x00800000>;
74 reg = <0x2a110000 0x1000>;
75 interrupts = <0 85 4>;
82 reg = <0x2a150000 0x1000>;
89 reg = <0x2a190000 0x1000>;
90 interrupts = <0 86 4>,
91 <0 87 4>;
98 reg = <0x2c000000 0x58>;
103 reg = <0x2c000600 0x20>;
104 interrupts = <1 13 0x304>;
110 reg = <0x2c000200 0x20>;
111 interrupts = <1 11 0x304>;
117 reg = <0x2c000620 0x20>;
118 interrupts = <1 14 0x304>;
124 #address-cells = <0>;
126 reg = <0x2c001000 0x1000>,
127 <0x2c000100 0x100>;
132 reg = <0x2c0f0000 0x1000>;
133 interrupts = <0 84 4>;
139 interrupts = <0 68 4>,
140 <0 69 4>;
150 arm,vexpress-sysreg,func = <1 0>;
152 #clock-cells = <0>;
161 #clock-cells = <0>;
170 #clock-cells = <0>;
179 #clock-cells = <0>;
188 #clock-cells = <0>;
197 #clock-cells = <0>;
204 arm,vexpress-sysreg,func = <4 0>;
214 ranges = <0 0 0x08000000 0x04000000>,
215 <1 0 0x14000000 0x04000000>,
216 <2 0 0x18000000 0x04000000>,
217 <3 0 0x1c000000 0x04000000>,
218 <4 0 0x0c000000 0x04000000>,
219 <5 0 0x10000000 0x04000000>;
222 interrupt-map-mask = <0 0 63>;
223 interrupt-map = <0 0 0 &gic 0 0 4>,
224 <0 0 1 &gic 0 1 4>,
225 <0 0 2 &gic 0 2 4>,
226 <0 0 3 &gic 0 3 4>,
227 <0 0 4 &gic 0 4 4>,
228 <0 0 5 &gic 0 5 4>,
229 <0 0 6 &gic 0 6 4>,
230 <0 0 7 &gic 0 7 4>,
231 <0 0 8 &gic 0 8 4>,
232 <0 0 9 &gic 0 9 4>,
233 <0 0 10 &gic 0 10 4>,
234 <0 0 11 &gic 0 11 4>,
235 <0 0 12 &gic 0 12 4>,
236 <0 0 13 &gic 0 13 4>,
237 <0 0 14 &gic 0 14 4>,
238 <0 0 15 &gic 0 15 4>,
239 <0 0 16 &gic 0 16 4>,
240 <0 0 17 &gic 0 17 4>,
241 <0 0 18 &gic 0 18 4>,
242 <0 0 19 &gic 0 19 4>,
243 <0 0 20 &gic 0 20 4>,
244 <0 0 21 &gic 0 21 4>,
245 <0 0 22 &gic 0 22 4>,
246 <0 0 23 &gic 0 23 4>,
247 <0 0 24 &gic 0 24 4>,
248 <0 0 25 &gic 0 25 4>,
249 <0 0 26 &gic 0 26 4>,
250 <0 0 27 &gic 0 27 4>,
251 <0 0 28 &gic 0 28 4>,
252 <0 0 29 &gic 0 29 4>,
253 <0 0 30 &gic 0 30 4>,
254 <0 0 31 &gic 0 31 4>,
255 <0 0 32 &gic 0 32 4>,
256 <0 0 33 &gic 0 33 4>,
257 <0 0 34 &gic 0 34 4>,
258 <0 0 35 &gic 0 35 4>,
259 <0 0 36 &gic 0 36 4>,
260 <0 0 37 &gic 0 37 4>,
261 <0 0 38 &gic 0 38 4>,
262 <0 0 39 &gic 0 39 4>,
263 <0 0 40 &gic 0 40 4>,
264 <0 0 41 &gic 0 41 4>,
265 <0 0 42 &gic 0 42 4>;
272 ranges = <0 0x40000000 0x40000000>;
274 interrupt-map-mask = <0 3>;
275 interrupt-map = <0 0 &gic 0 36 4>,
276 <0 1 &gic 0 37 4>,
277 <0 2 &gic 0 38 4>,
278 <0 3 &gic 0 39 4>;