Lines Matching +full:versatile +full:- +full:sysreg
1 // SPDX-License-Identifier: GPL-2.0
3 * ARM Ltd. Versatile Express
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a15";
42 cci-control-port = <&cci_control1>;
43 cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
44 capacity-dmips-mhz = <1024>;
45 dynamic-power-coefficient = <990>;
50 compatible = "arm,cortex-a15";
52 cci-control-port = <&cci_control1>;
53 cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
54 capacity-dmips-mhz = <1024>;
55 dynamic-power-coefficient = <990>;
60 compatible = "arm,cortex-a7";
62 cci-control-port = <&cci_control2>;
63 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
64 capacity-dmips-mhz = <516>;
65 dynamic-power-coefficient = <133>;
70 compatible = "arm,cortex-a7";
72 cci-control-port = <&cci_control2>;
73 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
74 capacity-dmips-mhz = <516>;
75 dynamic-power-coefficient = <133>;
80 compatible = "arm,cortex-a7";
82 cci-control-port = <&cci_control2>;
83 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
84 capacity-dmips-mhz = <516>;
85 dynamic-power-coefficient = <133>;
88 idle-states {
89 CLUSTER_SLEEP_BIG: cluster-sleep-big {
90 compatible = "arm,idle-state";
91 local-timer-stop;
92 entry-latency-us = <1000>;
93 exit-latency-us = <700>;
94 min-residency-us = <2000>;
97 CLUSTER_SLEEP_LITTLE: cluster-sleep-little {
98 compatible = "arm,idle-state";
99 local-timer-stop;
100 entry-latency-us = <1000>;
101 exit-latency-us = <500>;
102 min-residency-us = <2500>;
112 reserved-memory {
113 #address-cells = <2>;
114 #size-cells = <2>;
120 compatible = "shared-dma-pool";
122 no-map;
131 clock-names = "wdog_clk", "apb_pclk";
139 clock-names = "pxlclk";
142 memory-controller@2b0a0000 {
146 clock-names = "apb_pclk";
149 gic: interrupt-controller@2c001000 {
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
151 #interrupt-cells = <3>;
152 #address-cells = <0>;
153 interrupt-controller;
162 compatible = "arm,cci-400";
163 #address-cells = <1>;
164 #size-cells = <1>;
168 cci_control1: slave-if@4000 {
169 compatible = "arm,cci-400-ctrl-if";
170 interface-type = "ace";
174 cci_control2: slave-if@5000 {
175 compatible = "arm,cci-400-ctrl-if";
176 interface-type = "ace";
181 compatible = "arm,cci-400-pmu,r0";
191 memory-controller@7ffd0000 {
197 clock-names = "apb_pclk";
209 clock-names = "apb_pclk";
213 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
219 compatible = "arm,armv7-timer";
226 pmu-a15 {
227 compatible = "arm,cortex-a15-pmu";
230 interrupt-affinity = <&cpu0>,
234 pmu-a7 {
235 compatible = "arm,cortex-a7-pmu";
239 interrupt-affinity = <&cpu2>,
246 compatible = "fixed-clock";
247 #clock-cells = <0>;
248 clock-frequency = <24000000>;
249 clock-output-names = "oscclk6a";
253 compatible = "arm,vexpress,config-bus";
254 arm,vexpress,config-bridge = <&v2m_sysreg>;
258 compatible = "arm,vexpress-osc";
259 arm,vexpress-sysreg,func = <1 0>;
260 freq-range = <17000000 50000000>;
261 #clock-cells = <0>;
262 clock-output-names = "oscclk0";
267 compatible = "arm,vexpress-osc";
268 arm,vexpress-sysreg,func = <1 1>;
269 freq-range = <17000000 50000000>;
270 #clock-cells = <0>;
271 clock-output-names = "oscclk1";
276 compatible = "arm,vexpress-osc";
277 arm,vexpress-sysreg,func = <1 2>;
278 freq-range = <17000000 50000000>;
279 #clock-cells = <0>;
280 clock-output-names = "oscclk2";
285 compatible = "arm,vexpress-osc";
286 arm,vexpress-sysreg,func = <1 3>;
287 freq-range = <17000000 50000000>;
288 #clock-cells = <0>;
289 clock-output-names = "oscclk3";
294 compatible = "arm,vexpress-osc";
295 arm,vexpress-sysreg,func = <1 4>;
296 freq-range = <20000000 40000000>;
297 #clock-cells = <0>;
298 clock-output-names = "oscclk4";
303 compatible = "arm,vexpress-osc";
304 arm,vexpress-sysreg,func = <1 5>;
305 freq-range = <23750000 165000000>;
306 #clock-cells = <0>;
307 clock-output-names = "oscclk5";
312 compatible = "arm,vexpress-osc";
313 arm,vexpress-sysreg,func = <1 6>;
314 freq-range = <20000000 40000000>;
315 #clock-cells = <0>;
316 clock-output-names = "oscclk6";
321 compatible = "arm,vexpress-osc";
322 arm,vexpress-sysreg,func = <1 7>;
323 freq-range = <17000000 50000000>;
324 #clock-cells = <0>;
325 clock-output-names = "oscclk7";
330 compatible = "arm,vexpress-osc";
331 arm,vexpress-sysreg,func = <1 8>;
332 freq-range = <20000000 50000000>;
333 #clock-cells = <0>;
334 clock-output-names = "oscclk8";
337 volt-a15 {
339 compatible = "arm,vexpress-volt";
340 arm,vexpress-sysreg,func = <2 0>;
341 regulator-name = "A15 Vcore";
342 regulator-min-microvolt = <800000>;
343 regulator-max-microvolt = <1050000>;
344 regulator-always-on;
348 volt-a7 {
350 compatible = "arm,vexpress-volt";
351 arm,vexpress-sysreg,func = <2 1>;
352 regulator-name = "A7 Vcore";
353 regulator-min-microvolt = <800000>;
354 regulator-max-microvolt = <1050000>;
355 regulator-always-on;
359 amp-a15 {
361 compatible = "arm,vexpress-amp";
362 arm,vexpress-sysreg,func = <3 0>;
366 amp-a7 {
368 compatible = "arm,vexpress-amp";
369 arm,vexpress-sysreg,func = <3 1>;
373 temp-dcc {
375 compatible = "arm,vexpress-temp";
376 arm,vexpress-sysreg,func = <4 0>;
380 power-a15 {
382 compatible = "arm,vexpress-power";
383 arm,vexpress-sysreg,func = <12 0>;
387 power-a7 {
389 compatible = "arm,vexpress-power";
390 arm,vexpress-sysreg,func = <12 1>;
394 energy-a15 {
396 compatible = "arm,vexpress-energy";
397 arm,vexpress-sysreg,func = <13 0>, <13 1>;
401 energy-a7 {
403 compatible = "arm,vexpress-energy";
404 arm,vexpress-sysreg,func = <13 2>, <13 3>;
410 compatible = "arm,coresight-etb10", "arm,primecell";
414 clock-names = "apb_pclk";
415 in-ports {
418 remote-endpoint = <&replicator_out_port0>;
425 compatible = "arm,coresight-tpiu", "arm,primecell";
429 clock-names = "apb_pclk";
430 in-ports {
433 remote-endpoint = <&replicator_out_port1>;
440 /* non-configurable replicators don't show up on the
443 compatible = "arm,coresight-static-replicator";
445 out-ports {
446 #address-cells = <1>;
447 #size-cells = <0>;
452 remote-endpoint = <&etb_in_port>;
459 remote-endpoint = <&tpiu_in_port>;
464 in-ports {
467 remote-endpoint = <&funnel_out_port0>;
474 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
478 clock-names = "apb_pclk";
479 out-ports {
482 remote-endpoint =
488 in-ports {
489 #address-cells = <1>;
490 #size-cells = <0>;
495 remote-endpoint = <&ptm0_out_port>;
502 remote-endpoint = <&ptm1_out_port>;
509 remote-endpoint = <&etm0_out_port>;
518 remote-endpoint = <&etm1_out_port>;
525 remote-endpoint = <&etm2_out_port>;
532 compatible = "arm,coresight-etm3x", "arm,primecell";
537 clock-names = "apb_pclk";
538 out-ports {
541 remote-endpoint = <&funnel_in_port0>;
548 compatible = "arm,coresight-etm3x", "arm,primecell";
553 clock-names = "apb_pclk";
554 out-ports {
557 remote-endpoint = <&funnel_in_port1>;
564 compatible = "arm,coresight-etm3x", "arm,primecell";
569 clock-names = "apb_pclk";
570 out-ports {
573 remote-endpoint = <&funnel_in_port2>;
580 compatible = "arm,coresight-etm3x", "arm,primecell";
585 clock-names = "apb_pclk";
586 out-ports {
589 remote-endpoint = <&funnel_in_port4>;
596 compatible = "arm,coresight-etm3x", "arm,primecell";
601 clock-names = "apb_pclk";
602 out-ports {
605 remote-endpoint = <&funnel_in_port5>;
612 compatible = "simple-bus";
614 #address-cells = <2>;
615 #size-cells = <1>;
623 #interrupt-cells = <1>;
624 interrupt-map-mask = <0 0 63>;
625 interrupt-map = <0 0 0 &gic 0 0 4>,
671 compatible = "simple-bus";
672 #address-cells = <1>;
673 #size-cells = <1>;
675 #interrupt-cells = <1>;
676 interrupt-map-mask = <0 3>;
677 interrupt-map = <0 0 &gic 0 36 4>,