Lines Matching +full:versatile +full:- +full:sysreg
1 // SPDX-License-Identifier: GPL-2.0
3 * ARM Ltd. Versatile Express
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
56 reserved-memory {
57 #address-cells = <2>;
58 #size-cells = <2>;
64 compatible = "shared-dma-pool";
66 no-map;
75 clock-names = "pxlclk";
78 memory-controller@2b0a0000 {
82 clock-names = "apb_pclk";
91 clock-names = "wdog_clk", "apb_pclk";
94 gic: interrupt-controller@2c001000 {
95 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
96 #interrupt-cells = <3>;
97 #address-cells = <0>;
98 interrupt-controller;
106 memory-controller@7ffd0000 {
112 clock-names = "apb_pclk";
124 clock-names = "apb_pclk";
128 compatible = "arm,armv7-timer";
136 compatible = "arm,cortex-a15-pmu";
142 compatible = "arm,vexpress,config-bus";
143 arm,vexpress,config-bridge = <&v2m_sysreg>;
147 compatible = "arm,vexpress-osc";
148 arm,vexpress-sysreg,func = <1 0>;
149 freq-range = <50000000 60000000>;
150 #clock-cells = <0>;
151 clock-output-names = "oscclk0";
156 compatible = "arm,vexpress-osc";
157 arm,vexpress-sysreg,func = <1 4>;
158 freq-range = <20000000 40000000>;
159 #clock-cells = <0>;
160 clock-output-names = "oscclk4";
165 compatible = "arm,vexpress-osc";
166 arm,vexpress-sysreg,func = <1 5>;
167 freq-range = <23750000 165000000>;
168 #clock-cells = <0>;
169 clock-output-names = "oscclk5";
174 compatible = "arm,vexpress-osc";
175 arm,vexpress-sysreg,func = <1 6>;
176 freq-range = <20000000 50000000>;
177 #clock-cells = <0>;
178 clock-output-names = "oscclk6";
183 compatible = "arm,vexpress-osc";
184 arm,vexpress-sysreg,func = <1 7>;
185 freq-range = <20000000 60000000>;
186 #clock-cells = <0>;
187 clock-output-names = "oscclk7";
192 compatible = "arm,vexpress-osc";
193 arm,vexpress-sysreg,func = <1 8>;
194 freq-range = <40000000 40000000>;
195 #clock-cells = <0>;
196 clock-output-names = "oscclk8";
199 volt-cores {
201 compatible = "arm,vexpress-volt";
202 arm,vexpress-sysreg,func = <2 0>;
203 regulator-name = "Cores";
204 regulator-min-microvolt = <800000>;
205 regulator-max-microvolt = <1050000>;
206 regulator-always-on;
210 amp-cores {
212 compatible = "arm,vexpress-amp";
213 arm,vexpress-sysreg,func = <3 0>;
217 temp-dcc {
219 compatible = "arm,vexpress-temp";
220 arm,vexpress-sysreg,func = <4 0>;
224 power-cores {
226 compatible = "arm,vexpress-power";
227 arm,vexpress-sysreg,func = <12 0>;
233 compatible = "arm,vexpress-energy";
234 arm,vexpress-sysreg,func = <13 0>;
240 compatible = "simple-bus";
242 #address-cells = <2>;
243 #size-cells = <1>;
251 #interrupt-cells = <1>;
252 interrupt-map-mask = <0 0 63>;
253 interrupt-map = <0 0 0 &gic 0 0 4>,
299 compatible = "simple-bus";
300 #address-cells = <1>;
301 #size-cells = <1>;
303 #interrupt-cells = <1>;
304 interrupt-map-mask = <0 3>;
305 interrupt-map = <0 0 &gic 0 36 4>,