Lines Matching +full:dp +full:- +full:phy1
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
13 interrupt-parent = <&lic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
23 compatible = "nvidia,tegra124-pcie";
28 reg-names = "pads", "afi", "cs";
31 interrupt-names = "intr", "msi";
33 #interrupt-cells = <1>;
34 interrupt-map-mask = <0 0 0 0>;
35 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
37 bus-range = <0x00 0xff>;
38 #address-cells = <3>;
39 #size-cells = <2>;
44 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
51 clock-names = "pex", "afi", "pll_e", "cml";
55 reset-names = "pex", "afi", "pcie_x";
60 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
62 bus-range = <0x00 0xff>;
65 #address-cells = <3>;
66 #size-cells = <2>;
69 nvidia,num-lanes = <2>;
74 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
76 bus-range = <0x00 0xff>;
79 #address-cells = <3>;
80 #size-cells = <2>;
83 nvidia,num-lanes = <1>;
88 compatible = "nvidia,tegra124-host1x";
92 interrupt-names = "syncpt", "host1x";
94 clock-names = "host1x";
96 reset-names = "host1x";
99 #address-cells = <2>;
100 #size-cells = <2>;
105 compatible = "nvidia,tegra124-dc";
109 clock-names = "dc";
111 reset-names = "dc";
119 compatible = "nvidia,tegra124-dc";
123 clock-names = "dc";
125 reset-names = "dc";
133 compatible = "nvidia,tegra124-hdmi";
138 clock-names = "hdmi", "parent";
140 reset-names = "hdmi";
145 compatible = "nvidia,tegra124-vic";
149 clock-names = "vic";
151 reset-names = "vic";
157 compatible = "nvidia,tegra124-sor";
165 clock-names = "sor", "out", "parent", "dp", "safe";
167 reset-names = "sor";
172 compatible = "nvidia,tegra124-dpaux";
177 clock-names = "dpaux", "parent";
179 reset-names = "dpaux";
182 i2c-bus {
183 #address-cells = <1>;
184 #size-cells = <0>;
189 gic: interrupt-controller@50041000 {
190 compatible = "arm,cortex-a15-gic";
191 #interrupt-cells = <3>;
192 interrupt-controller;
199 interrupt-parent = <&gic>;
204 * U-Boot version was looking for that particular notation in order to
205 * perform required fix-ups on that GPU node.
213 interrupt-names = "stall", "nonstall";
216 clock-names = "gpu", "pwr";
218 reset-names = "gpu";
225 lic: interrupt-controller@60004000 {
226 compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
232 interrupt-controller;
233 #interrupt-cells = <3>;
234 interrupt-parent = <&gic>;
238 compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
250 compatible = "nvidia,tegra124-car";
252 #clock-cells = <1>;
253 #reset-cells = <1>;
254 nvidia,external-memory-controller = <&emc>;
257 flow-controller@60007000 {
258 compatible = "nvidia,tegra124-flowctrl";
263 compatible = "nvidia,tegra124-actmon";
268 clock-names = "actmon", "emc";
270 reset-names = "actmon";
274 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
284 #gpio-cells = <2>;
285 gpio-controller;
286 #interrupt-cells = <2>;
287 interrupt-controller;
289 gpio-ranges = <&pinmux 0 0 251>;
294 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
330 reset-names = "dma";
331 #dma-cells = <1>;
335 compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
341 compatible = "nvidia,tegra124-pinmux";
351 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
353 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
356 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
358 reg-shift = <2>;
362 reset-names = "serial";
364 dma-names = "rx", "tx";
369 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
371 reg-shift = <2>;
375 reset-names = "serial";
377 dma-names = "rx", "tx";
382 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
384 reg-shift = <2>;
388 reset-names = "serial";
390 dma-names = "rx", "tx";
395 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
397 reg-shift = <2>;
401 reset-names = "serial";
403 dma-names = "rx", "tx";
408 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
410 #pwm-cells = <2>;
413 reset-names = "pwm";
418 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
421 #address-cells = <1>;
422 #size-cells = <0>;
424 clock-names = "div-clk";
426 reset-names = "i2c";
428 dma-names = "rx", "tx";
433 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
436 #address-cells = <1>;
437 #size-cells = <0>;
439 clock-names = "div-clk";
441 reset-names = "i2c";
443 dma-names = "rx", "tx";
448 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
451 #address-cells = <1>;
452 #size-cells = <0>;
454 clock-names = "div-clk";
456 reset-names = "i2c";
458 dma-names = "rx", "tx";
463 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
466 #address-cells = <1>;
467 #size-cells = <0>;
469 clock-names = "div-clk";
471 reset-names = "i2c";
473 dma-names = "rx", "tx";
478 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
481 #address-cells = <1>;
482 #size-cells = <0>;
484 clock-names = "div-clk";
486 reset-names = "i2c";
488 dma-names = "rx", "tx";
493 compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
496 #address-cells = <1>;
497 #size-cells = <0>;
499 clock-names = "div-clk";
501 reset-names = "i2c";
503 dma-names = "rx", "tx";
508 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
511 #address-cells = <1>;
512 #size-cells = <0>;
514 clock-names = "spi";
516 reset-names = "spi";
518 dma-names = "rx", "tx";
523 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
526 #address-cells = <1>;
527 #size-cells = <0>;
529 clock-names = "spi";
531 reset-names = "spi";
533 dma-names = "rx", "tx";
538 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
541 #address-cells = <1>;
542 #size-cells = <0>;
544 clock-names = "spi";
546 reset-names = "spi";
548 dma-names = "rx", "tx";
553 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
556 #address-cells = <1>;
557 #size-cells = <0>;
559 clock-names = "spi";
561 reset-names = "spi";
563 dma-names = "rx", "tx";
568 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
571 #address-cells = <1>;
572 #size-cells = <0>;
574 clock-names = "spi";
576 reset-names = "spi";
578 dma-names = "rx", "tx";
583 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
586 #address-cells = <1>;
587 #size-cells = <0>;
589 clock-names = "spi";
591 reset-names = "spi";
593 dma-names = "rx", "tx";
598 compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
605 compatible = "nvidia,tegra124-pmc";
608 clock-names = "pclk", "clk32k_in";
609 #clock-cells = <1>;
613 compatible = "nvidia,tegra124-efuse";
616 clock-names = "fuse";
618 reset-names = "fuse";
621 mc: memory-controller@70019000 {
622 compatible = "nvidia,tegra124-mc";
625 clock-names = "mc";
629 #iommu-cells = <1>;
630 #reset-cells = <1>;
633 emc: external-memory-controller@7001b000 {
634 compatible = "nvidia,tegra124-emc";
637 clock-names = "emc";
639 nvidia,memory-controller = <&mc>;
643 compatible = "nvidia,tegra124-ahci";
651 clock-names = "sata", "sata-oob", "cml1", "pll_e";
655 reset-names = "sata", "sata-oob", "sata-cold";
660 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
666 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
670 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
675 compatible = "nvidia,tegra124-xusb";
679 reg-names = "hcd", "fpci", "ipfs";
695 clock-names = "xusb_host", "xusb_host_src",
702 reset-names = "xusb_host", "xusb_ss", "xusb_src";
704 nvidia,xusb-padctl = <&padctl>;
710 compatible = "nvidia,tegra124-xusb-padctl";
713 reset-names = "padctl";
720 usb2-0 {
722 #phy-cells = <0>;
725 usb2-1 {
727 #phy-cells = <0>;
730 usb2-2 {
732 #phy-cells = <0>;
741 ulpi-0 {
743 #phy-cells = <0>;
752 hsic-0 {
754 #phy-cells = <0>;
757 hsic-1 {
759 #phy-cells = <0>;
768 pcie-0 {
770 #phy-cells = <0>;
773 pcie-1 {
775 #phy-cells = <0>;
778 pcie-2 {
780 #phy-cells = <0>;
783 pcie-3 {
785 #phy-cells = <0>;
788 pcie-4 {
790 #phy-cells = <0>;
799 sata-0 {
801 #phy-cells = <0>;
808 usb2-0 {
812 usb2-1 {
816 usb2-2 {
820 ulpi-0 {
824 hsic-0 {
828 hsic-1 {
832 usb3-0 {
836 usb3-1 {
843 compatible = "nvidia,tegra124-sdhci";
847 clock-names = "sdhci";
849 reset-names = "sdhci";
854 compatible = "nvidia,tegra124-sdhci";
858 clock-names = "sdhci";
860 reset-names = "sdhci";
865 compatible = "nvidia,tegra124-sdhci";
869 clock-names = "sdhci";
871 reset-names = "sdhci";
876 compatible = "nvidia,tegra124-sdhci";
880 clock-names = "sdhci";
882 reset-names = "sdhci";
887 compatible = "nvidia,tegra124-cec";
891 clock-names = "cec";
893 hdmi-phandle = <&hdmi>;
896 soctherm: thermal-sensor@700e2000 {
897 compatible = "nvidia,tegra124-soctherm";
900 reg-names = "soctherm-reg", "car-reg";
904 clock-names = "tsensor", "soctherm";
906 reset-names = "soctherm";
907 #thermal-sensor-cells = <1>;
909 throttle-cfgs {
912 nvidia,cpu-throt-percent = <85>;
914 #cooling-cells = <2>;
920 compatible = "nvidia,tegra124-dfll";
924 <0 0x70110200 0 0x100>; /* Look-up table RAM */
929 clock-names = "soc", "ref", "i2c";
931 reset-names = "dvco";
932 #clock-cells = <0>;
933 clock-output-names = "dfllCPU_out";
934 nvidia,sample-rate = <12500>;
935 nvidia,droop-ctrl = <0x00000f00>;
936 nvidia,force-mode = <1>;
944 compatible = "nvidia,tegra124-ahub";
951 clock-names = "d_audio", "apbif";
973 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
987 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
992 #address-cells = <2>;
993 #size-cells = <2>;
996 compatible = "nvidia,tegra124-i2s";
998 nvidia,ahub-cif-ids = <4 4>;
1001 reset-names = "i2s";
1006 compatible = "nvidia,tegra124-i2s";
1008 nvidia,ahub-cif-ids = <5 5>;
1011 reset-names = "i2s";
1016 compatible = "nvidia,tegra124-i2s";
1018 nvidia,ahub-cif-ids = <6 6>;
1021 reset-names = "i2s";
1026 compatible = "nvidia,tegra124-i2s";
1028 nvidia,ahub-cif-ids = <7 7>;
1031 reset-names = "i2s";
1036 compatible = "nvidia,tegra124-i2s";
1038 nvidia,ahub-cif-ids = <8 8>;
1041 reset-names = "i2s";
1047 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1053 reset-names = "usb";
1054 nvidia,phy = <&phy1>;
1058 phy1: usb-phy@7d000000 { label
1059 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1066 clock-names = "reg", "pll_u", "utmi-pads";
1068 reset-names = "usb", "utmi-pads";
1069 #phy-cells = <0>;
1070 nvidia,hssync-start-delay = <0>;
1071 nvidia,idle-wait-delay = <17>;
1072 nvidia,elastic-limit = <16>;
1073 nvidia,term-range-adj = <6>;
1074 nvidia,xcvr-setup = <9>;
1075 nvidia,xcvr-lsfslew = <0>;
1076 nvidia,xcvr-lsrslew = <3>;
1077 nvidia,hssquelch-level = <2>;
1078 nvidia,hsdiscon-level = <5>;
1079 nvidia,xcvr-hsslew = <12>;
1080 nvidia,has-utmi-pad-registers;
1085 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1091 reset-names = "usb";
1096 phy2: usb-phy@7d004000 {
1097 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1104 clock-names = "reg", "pll_u", "utmi-pads";
1106 reset-names = "usb", "utmi-pads";
1107 #phy-cells = <0>;
1108 nvidia,hssync-start-delay = <0>;
1109 nvidia,idle-wait-delay = <17>;
1110 nvidia,elastic-limit = <16>;
1111 nvidia,term-range-adj = <6>;
1112 nvidia,xcvr-setup = <9>;
1113 nvidia,xcvr-lsfslew = <0>;
1114 nvidia,xcvr-lsrslew = <3>;
1115 nvidia,hssquelch-level = <2>;
1116 nvidia,hsdiscon-level = <5>;
1117 nvidia,xcvr-hsslew = <12>;
1122 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
1128 reset-names = "usb";
1133 phy3: usb-phy@7d008000 {
1134 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1141 clock-names = "reg", "pll_u", "utmi-pads";
1143 reset-names = "usb", "utmi-pads";
1144 #phy-cells = <0>;
1145 nvidia,hssync-start-delay = <0>;
1146 nvidia,idle-wait-delay = <17>;
1147 nvidia,elastic-limit = <16>;
1148 nvidia,term-range-adj = <6>;
1149 nvidia,xcvr-setup = <9>;
1150 nvidia,xcvr-lsfslew = <0>;
1151 nvidia,xcvr-lsrslew = <3>;
1152 nvidia,hssquelch-level = <2>;
1153 nvidia,hsdiscon-level = <5>;
1154 nvidia,xcvr-hsslew = <12>;
1159 #address-cells = <1>;
1160 #size-cells = <0>;
1164 compatible = "arm,cortex-a15";
1172 clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
1174 clock-latency = <300000>;
1179 compatible = "arm,cortex-a15";
1185 compatible = "arm,cortex-a15";
1191 compatible = "arm,cortex-a15";
1197 compatible = "arm,cortex-a15-pmu";
1202 interrupt-affinity = <&{/cpus/cpu@0}>,
1208 thermal-zones {
1210 polling-delay-passive = <1000>;
1211 polling-delay = <1000>;
1213 thermal-sensors =
1217 cpu-shutdown-trip {
1222 cpu_throttle_trip: throttle-trip {
1229 cooling-maps {
1232 cooling-device = <&throttle_heavy 1 1>;
1238 polling-delay-passive = <1000>;
1239 polling-delay = <1000>;
1241 thermal-sensors =
1245 mem-shutdown-trip {
1252 cooling-maps {
1261 polling-delay-passive = <1000>;
1262 polling-delay = <1000>;
1264 thermal-sensors =
1268 gpu-shutdown-trip {
1273 gpu_throttle_trip: throttle-trip {
1280 cooling-maps {
1283 cooling-device = <&throttle_heavy 1 1>;
1289 polling-delay-passive = <1000>;
1290 polling-delay = <1000>;
1292 thermal-sensors =
1296 pllx-shutdown-trip {
1303 cooling-maps {
1313 compatible = "arm,armv7-timer";
1322 interrupt-parent = <&gic>;