Lines Matching refs:ccu
44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
66 <&ccu CLK_TCON0>, <&ccu CLK_HDMI>;
75 <&ccu CLK_TVE>;
118 clocks = <&ccu CLK_BUS_DE>,
119 <&ccu CLK_DE>;
122 resets = <&ccu RST_BUS_DE>;
154 clocks = <&ccu CLK_BUS_DMA>;
155 resets = <&ccu RST_BUS_DMA>;
164 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
166 resets = <&ccu RST_BUS_TCON0>;
199 resets = <&ccu RST_BUS_MMC0>;
212 resets = <&ccu RST_BUS_MMC1>;
223 resets = <&ccu RST_BUS_MMC2>;
246 clocks = <&ccu CLK_BUS_MSGBOX>;
247 resets = <&ccu RST_BUS_MSGBOX>;
255 clocks = <&ccu CLK_BUS_OTG>;
256 resets = <&ccu RST_BUS_OTG>;
278 clocks = <&ccu CLK_USB_PHY0>,
279 <&ccu CLK_USB_PHY1>,
280 <&ccu CLK_USB_PHY2>,
281 <&ccu CLK_USB_PHY3>;
286 resets = <&ccu RST_USB_PHY0>,
287 <&ccu RST_USB_PHY1>,
288 <&ccu RST_USB_PHY2>,
289 <&ccu RST_USB_PHY3>;
302 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
303 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
311 clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
312 <&ccu CLK_USB_OHCI0>;
313 resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
321 clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
322 resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
332 clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>,
333 <&ccu CLK_USB_OHCI1>;
334 resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
344 clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>;
345 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
355 clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>,
356 <&ccu CLK_USB_OHCI2>;
357 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
367 clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>;
368 resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
378 clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>,
379 <&ccu CLK_USB_OHCI3>;
380 resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
386 ccu: clock@1c20000 { label
400 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
528 resets = <&ccu RST_BUS_EMAC>;
530 clocks = <&ccu CLK_BUS_EMAC>;
556 clocks = <&ccu CLK_BUS_EPHY>;
557 resets = <&ccu RST_BUS_EPHY>;
572 clocks = <&ccu CLK_MBUS>;
583 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
589 resets = <&ccu RST_BUS_SPI0>;
599 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
605 resets = <&ccu RST_BUS_SPI1>;
623 clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
624 resets = <&ccu RST_BUS_SPDIF>;
644 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
647 resets = <&ccu RST_BUS_I2S0>;
657 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
660 resets = <&ccu RST_BUS_I2S1>;
670 clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
672 resets = <&ccu RST_BUS_CODEC>;
685 clocks = <&ccu CLK_BUS_UART0>;
686 resets = <&ccu RST_BUS_UART0>;
698 clocks = <&ccu CLK_BUS_UART1>;
699 resets = <&ccu RST_BUS_UART1>;
711 clocks = <&ccu CLK_BUS_UART2>;
712 resets = <&ccu RST_BUS_UART2>;
724 clocks = <&ccu CLK_BUS_UART3>;
725 resets = <&ccu RST_BUS_UART3>;
735 clocks = <&ccu CLK_BUS_I2C0>;
736 resets = <&ccu RST_BUS_I2C0>;
748 clocks = <&ccu CLK_BUS_I2C1>;
749 resets = <&ccu RST_BUS_I2C1>;
761 clocks = <&ccu CLK_BUS_I2C2>;
762 resets = <&ccu RST_BUS_I2C2>;
785 clocks = <&ccu CLK_BUS_CSI>,
786 <&ccu CLK_CSI_SCLK>,
787 <&ccu CLK_DRAM_CSI>;
789 resets = <&ccu RST_BUS_CSI>;
801 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
802 <&ccu CLK_HDMI>;
804 resets = <&ccu RST_BUS_HDMI1>;
831 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
832 <&ccu CLK_PLL_VIDEO>;
834 resets = <&ccu RST_BUS_HDMI0>;
850 compatible = "allwinner,sun8i-h3-r-ccu";
853 <&ccu CLK_PLL_PERIPH0>;