Lines Matching +full:0 +full:x01ef0000
86 #clock-cells = <0>;
94 #clock-cells = <0>;
117 reg = <0x01000000 0x10000>;
128 compatible = "allwinner,sun8i-h3-de2-mixer-0";
129 reg = <0x01100000 0x100000>;
138 #size-cells = <0>;
152 reg = <0x01c02000 0x1000>;
162 reg = <0x01c0c000 0x1000>;
171 #size-cells = <0>;
173 tcon0_in: port@0 {
174 reg = <0>;
183 #size-cells = <0>;
196 reg = <0x01c0f000 0x1000>;
198 pinctrl-0 = <&mmc0_pins>;
204 #size-cells = <0>;
209 reg = <0x01c10000 0x1000>;
211 pinctrl-0 = <&mmc1_pins>;
217 #size-cells = <0>;
222 reg = <0x01c11000 0x1000>;
228 #size-cells = <0>;
233 reg = <0x1c14000 0x400>;
238 reg = <0x34 4>;
245 reg = <0x01c17000 0x1000>;
254 reg = <0x01c19000 0x400>;
259 phys = <&usbphy 0>;
261 extcon = <&usbphy 0>;
268 reg = <0x01c19400 0x2c>,
269 <0x01c1a800 0x4>,
270 <0x01c1b800 0x4>,
271 <0x01c1c800 0x4>,
272 <0x01c1d800 0x4>;
300 reg = <0x01c1a000 0x100>;
309 reg = <0x01c1a400 0x100>;
319 reg = <0x01c1b000 0x100>;
330 reg = <0x01c1b400 0x100>;
342 reg = <0x01c1c000 0x100>;
353 reg = <0x01c1c400 0x100>;
365 reg = <0x01c1d000 0x100>;
376 reg = <0x01c1d400 0x100>;
388 reg = <0x01c20000 0x400>;
389 clocks = <&osc24M>, <&rtc 0>;
397 reg = <0x01c20800 0x400>;
400 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
516 reg = <0x01c20c00 0xa0>;
525 reg = <0x01c30000 0x10000>;
536 #size-cells = <0>;
543 #size-cells = <0>;
551 #size-cells = <0>;
564 #size-cells = <0>;
571 reg = <0x01c62000 0x1000>;
575 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
581 reg = <0x01c68000 0x1000>;
588 pinctrl-0 = <&spi0_pins>;
592 #size-cells = <0>;
597 reg = <0x01c69000 0x1000>;
604 pinctrl-0 = <&spi1_pins>;
608 #size-cells = <0>;
613 reg = <0x01c20ca0 0x20>;
619 #sound-dai-cells = <0>;
621 reg = <0x01c21000 0x400>;
633 reg = <0x01c21400 0x8>;
640 #sound-dai-cells = <0>;
642 reg = <0x01c22000 0x400>;
653 #sound-dai-cells = <0>;
655 reg = <0x01c22400 0x400>;
666 #sound-dai-cells = <0>;
668 reg = <0x01c22c00 0x400>;
681 reg = <0x01c28000 0x400>;
682 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
694 reg = <0x01c28400 0x400>;
707 reg = <0x01c28800 0x400>;
720 reg = <0x01c28c00 0x400>;
733 reg = <0x01c2ac00 0x400>;
738 pinctrl-0 = <&i2c0_pins>;
741 #size-cells = <0>;
746 reg = <0x01c2b000 0x400>;
751 pinctrl-0 = <&i2c1_pins>;
754 #size-cells = <0>;
759 reg = <0x01c2b400 0x400>;
764 pinctrl-0 = <&i2c2_pins>;
767 #size-cells = <0>;
772 reg = <0x01c81000 0x1000>,
773 <0x01c82000 0x2000>,
774 <0x01c84000 0x2000>,
775 <0x01c86000 0x2000>;
783 reg = <0x01cb0000 0x1000>;
791 pinctrl-0 = <&csi_pins>;
798 reg = <0x01ee0000 0x10000>;
812 #size-cells = <0>;
814 hdmi_in: port@0 {
815 reg = <0>;
830 reg = <0x01ef0000 0x10000>;
833 clock-names = "bus", "mod", "pll-0";
836 #phy-cells = <0>;
841 reg = <0x01f00000 0x400>;
851 reg = <0x01f01400 0x100>;
852 clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
861 reg = <0x01f015c0 0x4>;
870 reg = <0x01f02000 0x400>;
876 reg = <0x01f02400 0x400>;
879 pinctrl-0 = <&r_i2c_pins>;
884 #size-cells = <0>;
889 reg = <0x01f02c00 0x400>;
891 clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
916 reg = <0x01f03800 0x8>;
918 pinctrl-0 = <&r_pwm_pin>;