Lines Matching +full:sun8i +full:- +full:v3s +full:- +full:csi
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
51 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
58 framebuffer-lcd {
59 compatible = "allwinner,simple-framebuffer",
60 "simple-framebuffer";
61 allwinner,pipeline = "mixer0-lcd0";
69 #address-cells = <1>;
70 #size-cells = <0>;
73 compatible = "arm,cortex-a7";
80 de: display-engine {
81 compatible = "allwinner,sun8i-v3s-display-engine";
87 compatible = "arm,armv7-timer";
95 #address-cells = <1>;
96 #size-cells = <1>;
100 #clock-cells = <0>;
101 compatible = "fixed-clock";
102 clock-frequency = <24000000>;
103 clock-accuracy = <50000>;
104 clock-output-names = "osc24M";
108 #clock-cells = <0>;
109 compatible = "fixed-clock";
110 clock-frequency = <32768>;
111 clock-accuracy = <50000>;
112 clock-output-names = "ext-osc32k";
117 compatible = "simple-bus";
118 #address-cells = <1>;
119 #size-cells = <1>;
123 compatible = "allwinner,sun8i-v3s-de2-clk";
127 clock-names = "bus",
130 #clock-cells = <1>;
131 #reset-cells = <1>;
135 compatible = "allwinner,sun8i-v3s-de2-mixer";
139 clock-names = "bus",
144 #address-cells = <1>;
145 #size-cells = <0>;
151 remote-endpoint = <&tcon0_in_mixer0>;
157 syscon: system-control@1c00000 {
158 compatible = "allwinner,sun8i-v3s-system-control",
159 "allwinner,sun8i-h3-system-control";
161 #address-cells = <1>;
162 #size-cells = <1>;
166 tcon0: lcd-controller@1c0c000 {
167 compatible = "allwinner,sun8i-v3s-tcon";
172 clock-names = "ahb",
173 "tcon-ch0";
174 clock-output-names = "tcon-pixel-clock";
175 #clock-cells = <0>;
177 reset-names = "lcd";
181 #address-cells = <1>;
182 #size-cells = <0>;
188 remote-endpoint = <&mixer0_out_tcon0>;
193 #address-cells = <1>;
194 #size-cells = <0>;
202 compatible = "allwinner,sun7i-a20-mmc";
208 clock-names = "ahb",
213 reset-names = "ahb";
215 pinctrl-names = "default";
216 pinctrl-0 = <&mmc0_pins>;
218 #address-cells = <1>;
219 #size-cells = <0>;
223 compatible = "allwinner,sun7i-a20-mmc";
229 clock-names = "ahb",
234 reset-names = "ahb";
236 pinctrl-names = "default";
237 pinctrl-0 = <&mmc1_pins>;
239 #address-cells = <1>;
240 #size-cells = <0>;
244 compatible = "allwinner,sun7i-a20-mmc";
250 clock-names = "ahb",
255 reset-names = "ahb";
258 #address-cells = <1>;
259 #size-cells = <0>;
263 compatible = "allwinner,sun8i-v3s-crypto",
264 "allwinner,sun8i-a33-crypto";
268 clock-names = "ahb", "mod";
270 reset-names = "ahb";
274 compatible = "allwinner,sun8i-h3-musb";
279 interrupt-names = "mc";
281 phy-names = "usb";
287 compatible = "allwinner,sun8i-v3s-usb-phy";
290 reg-names = "phy_ctrl",
293 clock-names = "usb0_phy";
295 reset-names = "usb0_reset";
297 #phy-cells = <1>;
301 compatible = "allwinner,sun8i-v3s-ccu";
304 clock-names = "hosc", "losc";
305 #clock-cells = <1>;
306 #reset-cells = <1>;
310 #clock-cells = <1>;
311 compatible = "allwinner,sun8i-v3-rtc";
316 clock-output-names = "osc32k", "osc32k-out";
320 compatible = "allwinner,sun8i-v3s-pinctrl";
325 clock-names = "apb", "hosc", "losc";
326 gpio-controller;
327 #gpio-cells = <3>;
328 interrupt-controller;
329 #interrupt-cells = <3>;
331 /omit-if-no-ref/
332 csi1_8bit_pins: csi1-8bit-pins {
336 function = "csi";
339 /omit-if-no-ref/
340 csi1_mclk_pin: csi1-mclk-pin {
342 function = "csi";
345 i2c0_pins: i2c0-pins {
350 /omit-if-no-ref/
351 i2c1_pe_pins: i2c1-pe-pins {
356 uart0_pb_pins: uart0-pb-pins {
361 uart2_pins: uart2-pins {
366 mmc0_pins: mmc0-pins {
370 drive-strength = <30>;
371 bias-pull-up;
374 mmc1_pins: mmc1-pins {
378 drive-strength = <30>;
379 bias-pull-up;
382 spi0_pins: spi0-pins {
389 compatible = "allwinner,sun8i-v3s-timer";
398 compatible = "allwinner,sun6i-a31-wdt";
405 compatible = "allwinner,sun4i-a10-lradc-keys";
412 compatible = "snps,dw-apb-uart";
415 reg-shift = <2>;
416 reg-io-width = <4>;
423 compatible = "snps,dw-apb-uart";
426 reg-shift = <2>;
427 reg-io-width = <4>;
434 compatible = "snps,dw-apb-uart";
437 reg-shift = <2>;
438 reg-io-width = <4>;
441 pinctrl-0 = <&uart2_pins>;
442 pinctrl-names = "default";
447 compatible = "allwinner,sun6i-a31-i2c";
452 pinctrl-names = "default";
453 pinctrl-0 = <&i2c0_pins>;
455 #address-cells = <1>;
456 #size-cells = <0>;
460 compatible = "allwinner,sun6i-a31-i2c";
466 #address-cells = <1>;
467 #size-cells = <0>;
471 compatible = "allwinner,sun8i-v3s-emac";
475 interrupt-names = "macirq";
477 reset-names = "stmmaceth";
479 clock-names = "stmmaceth";
480 phy-handle = <&int_mii_phy>;
481 phy-mode = "mii";
485 #address-cells = <1>;
486 #size-cells = <0>;
487 compatible = "snps,dwmac-mdio";
490 mdio_mux: mdio-mux {
491 compatible = "allwinner,sun8i-h3-mdio-mux";
492 #address-cells = <1>;
493 #size-cells = <0>;
495 mdio-parent-bus = <&mdio>;
498 compatible = "allwinner,sun8i-h3-mdio-internal";
500 #address-cells = <1>;
501 #size-cells = <0>;
503 int_mii_phy: ethernet-phy@1 {
504 compatible = "ethernet-phy-ieee802.3-c22";
514 compatible = "allwinner,sun8i-h3-spi";
518 clock-names = "ahb", "mod";
519 pinctrl-names = "default";
520 pinctrl-0 = <&spi0_pins>;
523 #address-cells = <1>;
524 #size-cells = <0>;
528 compatible = "allwinner,sun8i-v3s-csi";
534 clock-names = "bus", "mod", "ram";
539 gic: interrupt-controller@1c81000 {
540 compatible = "arm,gic-400";
545 interrupt-controller;
546 #interrupt-cells = <3>;