Lines Matching +full:1 +full:c0b000
54 #address-cells = <1>;
55 #size-cells = <1>;
62 #address-cells = <1>;
63 #size-cells = <1>;
100 #address-cells = <1>;
122 cpu1: cpu@1 {
125 reg = <1>;
176 #address-cells = <1>;
177 #size-cells = <1>;
205 #address-cells = <1>;
206 #size-cells = <1>;
246 gmac_tx_clk: clk@1c20164 {
264 #address-cells = <1>;
265 #size-cells = <1>;
268 system-control@1c00000 {
272 #address-cells = <1>;
273 #size-cells = <1>;
279 #address-cells = <1>;
280 #size-cells = <1>;
294 #address-cells = <1>;
295 #size-cells = <1>;
306 sram_c: sram@1d00000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
321 nmi_intc: interrupt-controller@1c00030 {
329 dma: dma-controller@1c02000 {
337 nfc: nand-controller@1c03000 {
346 #address-cells = <1>;
350 spi0: spi@1c05000 {
360 #address-cells = <1>;
365 spi1: spi@1c06000 {
375 #address-cells = <1>;
377 num-cs = <1>;
380 csi0: csi@1c09000 {
390 emac: ethernet@1c0b000 {
395 allwinner,sram = <&emac_sram 1>;
399 mdio: mdio@1c0b080 {
403 #address-cells = <1>;
407 tcon0: lcd-controller@1c0c000 {
425 #address-cells = <1>;
429 #address-cells = <1>;
438 tcon0_in_be1: endpoint@1 {
439 reg = <1>;
444 tcon0_out: port@1 {
445 #address-cells = <1>;
447 reg = <1>;
449 tcon0_out_hdmi: endpoint@1 {
450 reg = <1>;
452 allwinner,tcon-channel = <1>;
458 tcon1: lcd-controller@1c0d000 {
476 #address-cells = <1>;
480 #address-cells = <1>;
489 tcon1_in_be1: endpoint@1 {
490 reg = <1>;
495 tcon1_out: port@1 {
496 #address-cells = <1>;
498 reg = <1>;
500 tcon1_out_hdmi: endpoint@1 {
501 reg = <1>;
503 allwinner,tcon-channel = <1>;
509 video-codec@1c0e000 {
517 allwinner,sram = <&ve_sram 1>;
520 mmc0: mmc@1c0f000 {
535 #address-cells = <1>;
539 mmc1: mmc@1c10000 {
552 #address-cells = <1>;
556 mmc2: mmc@1c11000 {
571 #address-cells = <1>;
575 mmc3: mmc@1c12000 {
590 #address-cells = <1>;
594 usb_otg: usb@1c13000 {
603 allwinner,sram = <&otg_sram 1>;
608 usbphy: phy@1c13400 {
609 #phy-cells = <1>;
622 ehci0: usb@1c14000 {
627 phys = <&usbphy 1>;
632 ohci0: usb@1c14400 {
637 phys = <&usbphy 1>;
642 crypto: crypto-engine@1c15000 {
651 hdmi: hdmi@1c16000 {
659 clock-names = "ahb", "mod", "pll-0", "pll-1";
667 #address-cells = <1>;
671 #address-cells = <1>;
680 hdmi_in_tcon1: endpoint@1 {
681 reg = <1>;
686 hdmi_out: port@1 {
687 reg = <1>;
692 spi2: spi@1c17000 {
702 #address-cells = <1>;
704 num-cs = <1>;
707 ahci: sata@1c18000 {
715 ehci1: usb@1c1c000 {
725 ohci1: usb@1c1c400 {
735 csi1: csi@1c1d000 {
746 spi3: spi@1c1f000 {
756 #address-cells = <1>;
758 num-cs = <1>;
761 ccu: clock@1c20000 {
766 #clock-cells = <1>;
767 #reset-cells = <1>;
770 pio: pinctrl@1c20800 {
985 ps2_1_ph_pins: ps2-1-ph-pins {
1184 timer@1c20c00 {
1196 wdt: watchdog@1c20c90 {
1203 rtc: rtc@1c20d00 {
1209 pwm: pwm@1c20e00 {
1217 spdif: spdif@1c21000 {
1230 ir0: ir@1c21800 {
1239 ir1: ir@1c21c00 {
1248 i2s1: i2s@1c22000 {
1261 i2s0: i2s@1c22400 {
1274 lradc: lradc@1c22800 {
1281 codec: codec@1c22c00 {
1294 sid: eeprom@1c23800 {
1299 i2s2: i2s@1c24400 {
1312 rtp: rtp@1c25000 {
1319 uart0: serial@1c28000 {
1322 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1329 uart1: serial@1c28400 {
1339 uart2: serial@1c28800 {
1349 uart3: serial@1c28c00 {
1359 uart4: serial@1c29000 {
1369 uart5: serial@1c29400 {
1379 uart6: serial@1c29800 {
1389 uart7: serial@1c29c00 {
1399 ps20: ps2@1c2a000 {
1407 ps21: ps2@1c2a400 {
1415 i2c0: i2c@1c2ac00 {
1424 #address-cells = <1>;
1428 i2c1: i2c@1c2b000 {
1437 #address-cells = <1>;
1441 i2c2: i2c@1c2b400 {
1450 #address-cells = <1>;
1454 i2c3: i2c@1c2b800 {
1463 #address-cells = <1>;
1467 can0: can@1c2bc00 {
1476 i2c4: i2c@1c2c000 {
1483 #address-cells = <1>;
1487 mali: gpu@1c40000 {
1512 gmac: ethernet@1c50000 {
1526 #address-cells = <1>;
1531 hstimer@1c60000 {
1541 gic: interrupt-controller@1c81000 {
1552 fe0: display-frontend@1e00000 {
1563 #address-cells = <1>;
1566 fe0_out: port@1 {
1567 #address-cells = <1>;
1569 reg = <1>;
1576 fe0_out_be1: endpoint@1 {
1577 reg = <1>;
1584 fe1: display-frontend@1e20000 {
1595 #address-cells = <1>;
1598 fe1_out: port@1 {
1599 #address-cells = <1>;
1601 reg = <1>;
1608 fe1_out_be1: endpoint@1 {
1609 reg = <1>;
1616 be1: display-backend@1e40000 {
1627 #address-cells = <1>;
1631 #address-cells = <1>;
1640 be1_in_fe1: endpoint@1 {
1641 reg = <1>;
1646 be1_out: port@1 {
1647 #address-cells = <1>;
1649 reg = <1>;
1656 be1_out_tcon1: endpoint@1 {
1657 reg = <1>;
1664 be0: display-backend@1e60000 {
1675 #address-cells = <1>;
1679 #address-cells = <1>;
1688 be0_in_fe1: endpoint@1 {
1689 reg = <1>;
1694 be0_out: port@1 {
1695 #address-cells = <1>;
1697 reg = <1>;
1704 be0_out_tcon1: endpoint@1 {
1705 reg = <1>;