Lines Matching +full:sun7i +full:- +full:a20 +full:- +full:codec
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
62 #size-cells = <1>;
65 simplefb_hdmi: framebuffer-lcd0-hdmi {
66 compatible = "allwinner,simple-framebuffer",
67 "simple-framebuffer";
68 allwinner,pipeline = "de_be0-lcd0-hdmi";
76 simplefb_lcd: framebuffer-lcd0 {
77 compatible = "allwinner,simple-framebuffer",
78 "simple-framebuffer";
79 allwinner,pipeline = "de_be0-lcd0";
88 compatible = "arm,armv7-timer";
93 clock-frequency = <24000000>;
94 arm,cpu-registers-not-fw-configured;
98 enable-method = "allwinner,sun6i-a31";
99 #address-cells = <1>;
100 #size-cells = <0>;
103 compatible = "arm,cortex-a7";
107 clock-latency = <244144>; /* 8 32k periods */
108 operating-points = <
115 #cooling-cells = <2>;
119 compatible = "arm,cortex-a7";
123 clock-latency = <244144>; /* 8 32k periods */
124 operating-points = <
131 #cooling-cells = <2>;
135 compatible = "arm,cortex-a7";
139 clock-latency = <244144>; /* 8 32k periods */
140 operating-points = <
147 #cooling-cells = <2>;
151 compatible = "arm,cortex-a7";
155 clock-latency = <244144>; /* 8 32k periods */
156 operating-points = <
163 #cooling-cells = <2>;
167 thermal-zones {
170 polling-delay-passive = <250>;
171 polling-delay = <1000>;
172 thermal-sensors = <&rtp>;
174 cooling-maps {
177 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
203 compatible = "arm,cortex-a7-pmu";
211 #address-cells = <1>;
212 #size-cells = <1>;
215 osc24M: clk-24M {
216 #clock-cells = <0>;
217 compatible = "fixed-clock";
218 clock-frequency = <24000000>;
219 clock-accuracy = <50000>;
220 clock-output-names = "osc24M";
223 osc32k: clk-32k {
224 #clock-cells = <0>;
225 compatible = "fixed-clock";
226 clock-frequency = <32768>;
227 clock-accuracy = <50000>;
228 clock-output-names = "ext_osc32k";
235 * mode, using clk_set_rate auto-reparenting.
240 mii_phy_tx_clk: clk-mii-phy-tx {
241 #clock-cells = <0>;
242 compatible = "fixed-clock";
243 clock-frequency = <25000000>;
244 clock-output-names = "mii_phy_tx";
247 gmac_int_tx_clk: clk-gmac-int-tx {
248 #clock-cells = <0>;
249 compatible = "fixed-clock";
250 clock-frequency = <125000000>;
251 clock-output-names = "gmac_int_tx";
255 #clock-cells = <0>;
256 compatible = "allwinner,sun7i-a20-gmac-clk";
259 clock-output-names = "gmac_tx";
263 de: display-engine {
264 compatible = "allwinner,sun6i-a31-display-engine";
270 compatible = "simple-bus";
271 #address-cells = <1>;
272 #size-cells = <1>;
275 dma: dma-controller@1c02000 {
276 compatible = "allwinner,sun6i-a31-dma";
281 #dma-cells = <1>;
284 tcon0: lcd-controller@1c0c000 {
285 compatible = "allwinner,sun6i-a31-tcon";
291 reset-names = "lcd",
297 clock-names = "ahb",
298 "tcon-ch0",
299 "tcon-ch1",
300 "lvds-alt";
301 clock-output-names = "tcon0-pixel-clock";
302 #clock-cells = <0>;
305 #address-cells = <1>;
306 #size-cells = <0>;
309 #address-cells = <1>;
310 #size-cells = <0>;
315 remote-endpoint = <&drc0_out_tcon0>;
320 remote-endpoint = <&drc1_out_tcon0>;
325 #address-cells = <1>;
326 #size-cells = <0>;
331 remote-endpoint = <&hdmi_in_tcon0>;
332 allwinner,tcon-channel = <1>;
338 tcon1: lcd-controller@1c0d000 {
339 compatible = "allwinner,sun6i-a31-tcon";
345 reset-names = "lcd", "lvds";
350 clock-names = "ahb",
351 "tcon-ch0",
352 "tcon-ch1",
353 "lvds-alt";
354 clock-output-names = "tcon1-pixel-clock";
355 #clock-cells = <0>;
358 #address-cells = <1>;
359 #size-cells = <0>;
362 #address-cells = <1>;
363 #size-cells = <0>;
368 remote-endpoint = <&drc0_out_tcon1>;
373 remote-endpoint = <&drc1_out_tcon1>;
378 #address-cells = <1>;
379 #size-cells = <0>;
384 remote-endpoint = <&hdmi_in_tcon1>;
385 allwinner,tcon-channel = <1>;
392 compatible = "allwinner,sun7i-a20-mmc";
398 clock-names = "ahb",
403 reset-names = "ahb";
405 pinctrl-names = "default";
406 pinctrl-0 = <&mmc0_pins>;
408 #address-cells = <1>;
409 #size-cells = <0>;
413 compatible = "allwinner,sun7i-a20-mmc";
419 clock-names = "ahb",
424 reset-names = "ahb";
426 pinctrl-names = "default";
427 pinctrl-0 = <&mmc1_pins>;
429 #address-cells = <1>;
430 #size-cells = <0>;
434 compatible = "allwinner,sun7i-a20-mmc";
440 clock-names = "ahb",
445 reset-names = "ahb";
448 #address-cells = <1>;
449 #size-cells = <0>;
453 compatible = "allwinner,sun7i-a20-mmc";
459 clock-names = "ahb",
464 reset-names = "ahb";
467 #address-cells = <1>;
468 #size-cells = <0>;
472 compatible = "allwinner,sun6i-a31-hdmi";
479 clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
481 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
486 #address-cells = <1>;
487 #size-cells = <0>;
490 #address-cells = <1>;
491 #size-cells = <0>;
496 remote-endpoint = <&tcon0_out_hdmi>;
501 remote-endpoint = <&tcon1_out_hdmi>;
512 compatible = "allwinner,sun6i-a31-musb";
517 interrupt-names = "mc";
519 phy-names = "usb";
526 compatible = "allwinner,sun6i-a31-usb-phy";
530 reg-names = "phy_ctrl",
536 clock-names = "usb0_phy",
542 reset-names = "usb0_reset",
546 #phy-cells = <1>;
550 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
556 phy-names = "usb";
561 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
567 phy-names = "usb";
572 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
578 phy-names = "usb";
583 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
589 phy-names = "usb";
594 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
603 compatible = "allwinner,sun6i-a31-ccu";
606 clock-names = "hosc", "losc";
607 #clock-cells = <1>;
608 #reset-cells = <1>;
612 compatible = "allwinner,sun6i-a31-pinctrl";
619 clock-names = "apb", "hosc", "losc";
620 gpio-controller;
621 interrupt-controller;
622 #interrupt-cells = <3>;
623 #gpio-cells = <3>;
625 gmac_gmii_pins: gmac-gmii-pins {
638 drive-strength = <30>;
641 gmac_mii_pins: gmac-mii-pins {
650 gmac_rgmii_pins: gmac-rgmii-pins {
660 drive-strength = <40>;
663 i2c0_pins: i2c0-pins {
668 i2c1_pins: i2c1-pins {
673 i2c2_pins: i2c2-pins {
678 lcd0_rgb888_pins: lcd0-rgb888-pins {
689 mmc0_pins: mmc0-pins {
693 drive-strength = <30>;
694 bias-pull-up;
697 mmc1_pins: mmc1-pins {
701 drive-strength = <30>;
702 bias-pull-up;
705 mmc2_4bit_pins: mmc2-4bit-pins {
709 drive-strength = <30>;
710 bias-pull-up;
713 mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
719 drive-strength = <30>;
720 bias-pull-up;
723 mmc3_8bit_emmc_pins: mmc3-8bit-emmc-pins {
729 drive-strength = <40>;
730 bias-pull-up;
733 spdif_tx_pin: spdif-tx-pin {
738 uart0_ph_pins: uart0-ph-pins {
745 compatible = "allwinner,sun4i-a10-timer";
757 compatible = "allwinner,sun6i-a31-wdt";
764 #sound-dai-cells = <0>;
765 compatible = "allwinner,sun6i-a31-spdif";
770 clock-names = "apb", "spdif";
772 dma-names = "rx", "tx";
777 #sound-dai-cells = <0>;
778 compatible = "allwinner,sun6i-a31-i2s";
783 clock-names = "apb", "mod";
785 dma-names = "rx", "tx";
790 #sound-dai-cells = <0>;
791 compatible = "allwinner,sun6i-a31-i2s";
796 clock-names = "apb", "mod";
798 dma-names = "rx", "tx";
803 compatible = "allwinner,sun4i-a10-lradc-keys";
810 compatible = "allwinner,sun6i-a31-ts";
813 #thermal-sensor-cells = <0>;
817 compatible = "snps,dw-apb-uart";
820 reg-shift = <2>;
821 reg-io-width = <4>;
825 dma-names = "rx", "tx";
830 compatible = "snps,dw-apb-uart";
833 reg-shift = <2>;
834 reg-io-width = <4>;
838 dma-names = "rx", "tx";
843 compatible = "snps,dw-apb-uart";
846 reg-shift = <2>;
847 reg-io-width = <4>;
851 dma-names = "rx", "tx";
856 compatible = "snps,dw-apb-uart";
859 reg-shift = <2>;
860 reg-io-width = <4>;
864 dma-names = "rx", "tx";
869 compatible = "snps,dw-apb-uart";
872 reg-shift = <2>;
873 reg-io-width = <4>;
877 dma-names = "rx", "tx";
882 compatible = "snps,dw-apb-uart";
885 reg-shift = <2>;
886 reg-io-width = <4>;
890 dma-names = "rx", "tx";
895 compatible = "allwinner,sun6i-a31-i2c";
900 pinctrl-names = "default";
901 pinctrl-0 = <&i2c0_pins>;
903 #address-cells = <1>;
904 #size-cells = <0>;
908 compatible = "allwinner,sun6i-a31-i2c";
913 pinctrl-names = "default";
914 pinctrl-0 = <&i2c1_pins>;
916 #address-cells = <1>;
917 #size-cells = <0>;
921 compatible = "allwinner,sun6i-a31-i2c";
926 pinctrl-names = "default";
927 pinctrl-0 = <&i2c2_pins>;
929 #address-cells = <1>;
930 #size-cells = <0>;
934 compatible = "allwinner,sun6i-a31-i2c";
940 #address-cells = <1>;
941 #size-cells = <0>;
945 compatible = "allwinner,sun7i-a20-gmac";
948 interrupt-names = "macirq";
950 clock-names = "stmmaceth", "allwinner_gmac_tx";
952 reset-names = "stmmaceth";
954 snps,fixed-burst;
959 compatible = "snps,dwmac-mdio";
960 #address-cells = <1>;
961 #size-cells = <0>;
965 crypto: crypto-engine@1c15000 {
966 compatible = "allwinner,sun6i-a31-crypto",
967 "allwinner,sun4i-a10-crypto";
971 clock-names = "ahb", "mod";
973 reset-names = "ahb";
976 codec: codec@1c22c00 { label
977 #sound-dai-cells = <0>;
978 compatible = "allwinner,sun6i-a31-codec";
982 clock-names = "apb", "codec";
985 dma-names = "rx", "tx";
990 compatible = "allwinner,sun6i-a31-hstimer",
991 "allwinner,sun7i-a20-hstimer";
1002 compatible = "allwinner,sun6i-a31-spi";
1006 clock-names = "ahb", "mod";
1008 dma-names = "rx", "tx";
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1016 compatible = "allwinner,sun6i-a31-spi";
1020 clock-names = "ahb", "mod";
1022 dma-names = "rx", "tx";
1025 #address-cells = <1>;
1026 #size-cells = <0>;
1030 compatible = "allwinner,sun6i-a31-spi";
1034 clock-names = "ahb", "mod";
1036 dma-names = "rx", "tx";
1039 #address-cells = <1>;
1040 #size-cells = <0>;
1044 compatible = "allwinner,sun6i-a31-spi";
1048 clock-names = "ahb", "mod";
1050 dma-names = "rx", "tx";
1053 #address-cells = <1>;
1054 #size-cells = <0>;
1057 gic: interrupt-controller@1c81000 {
1058 compatible = "arm,gic-400";
1063 interrupt-controller;
1064 #interrupt-cells = <3>;
1068 fe0: display-frontend@1e00000 {
1069 compatible = "allwinner,sun6i-a31-display-frontend";
1074 clock-names = "ahb", "mod",
1079 #address-cells = <1>;
1080 #size-cells = <0>;
1083 #address-cells = <1>;
1084 #size-cells = <0>;
1089 remote-endpoint = <&be0_in_fe0>;
1094 remote-endpoint = <&be1_in_fe0>;
1100 fe1: display-frontend@1e20000 {
1101 compatible = "allwinner,sun6i-a31-display-frontend";
1106 clock-names = "ahb", "mod",
1111 #address-cells = <1>;
1112 #size-cells = <0>;
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1121 remote-endpoint = <&be0_in_fe1>;
1126 remote-endpoint = <&be1_in_fe1>;
1132 be1: display-backend@1e40000 {
1133 compatible = "allwinner,sun6i-a31-display-backend";
1138 clock-names = "ahb", "mod",
1143 #address-cells = <1>;
1144 #size-cells = <0>;
1147 #address-cells = <1>;
1148 #size-cells = <0>;
1153 remote-endpoint = <&fe0_out_be1>;
1158 remote-endpoint = <&fe1_out_be1>;
1163 #address-cells = <1>;
1164 #size-cells = <0>;
1169 remote-endpoint = <&drc1_in_be1>;
1176 compatible = "allwinner,sun6i-a31-drc";
1181 clock-names = "ahb", "mod",
1186 #address-cells = <1>;
1187 #size-cells = <0>;
1190 #address-cells = <1>;
1191 #size-cells = <0>;
1196 remote-endpoint = <&be1_out_drc1>;
1201 #address-cells = <1>;
1202 #size-cells = <0>;
1207 remote-endpoint = <&tcon0_in_drc1>;
1212 remote-endpoint = <&tcon1_in_drc1>;
1218 be0: display-backend@1e60000 {
1219 compatible = "allwinner,sun6i-a31-display-backend";
1224 clock-names = "ahb", "mod",
1229 #address-cells = <1>;
1230 #size-cells = <0>;
1233 #address-cells = <1>;
1234 #size-cells = <0>;
1239 remote-endpoint = <&fe0_out_be0>;
1244 remote-endpoint = <&fe1_out_be0>;
1252 remote-endpoint = <&drc0_in_be0>;
1259 compatible = "allwinner,sun6i-a31-drc";
1264 clock-names = "ahb", "mod",
1269 #address-cells = <1>;
1270 #size-cells = <0>;
1276 remote-endpoint = <&be0_out_drc0>;
1281 #address-cells = <1>;
1282 #size-cells = <0>;
1287 remote-endpoint = <&tcon0_in_drc0>;
1292 remote-endpoint = <&tcon1_in_drc0>;
1299 #clock-cells = <1>;
1300 compatible = "allwinner,sun6i-a31-rtc";
1305 clock-output-names = "osc32k";
1308 nmi_intc: interrupt-controller@1f00c00 {
1309 compatible = "allwinner,sun6i-a31-r-intc";
1310 interrupt-controller;
1311 #interrupt-cells = <2>;
1317 compatible = "allwinner,sun6i-a31-prcm";
1321 compatible = "allwinner,sun6i-a31-ar100-clk";
1322 #clock-cells = <0>;
1326 clock-output-names = "ar100";
1330 compatible = "fixed-factor-clock";
1331 #clock-cells = <0>;
1332 clock-div = <1>;
1333 clock-mult = <1>;
1335 clock-output-names = "ahb0";
1339 compatible = "allwinner,sun6i-a31-apb0-clk";
1340 #clock-cells = <0>;
1342 clock-output-names = "apb0";
1346 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
1347 #clock-cells = <1>;
1349 clock-output-names = "apb0_pio", "apb0_ir",
1356 #clock-cells = <0>;
1357 compatible = "allwinner,sun4i-a10-mod0-clk";
1359 clock-output-names = "ir";
1363 compatible = "allwinner,sun6i-a31-clock-reset";
1364 #reset-cells = <1>;
1369 compatible = "allwinner,sun6i-a31-cpuconfig";
1374 compatible = "allwinner,sun6i-a31-ir";
1376 clock-names = "apb", "ir";
1384 compatible = "allwinner,sun6i-a31-r-pinctrl";
1389 clock-names = "apb", "hosc", "losc";
1391 gpio-controller;
1392 interrupt-controller;
1393 #interrupt-cells = <3>;
1394 #gpio-cells = <3>;
1396 s_ir_rx_pin: s-ir-rx-pin {
1401 s_p2wi_pins: s-p2wi-pins {
1408 compatible = "allwinner,sun6i-a31-p2wi";
1412 clock-frequency = <100000>;
1414 pinctrl-names = "default";
1415 pinctrl-0 = <&s_p2wi_pins>;
1417 #address-cells = <1>;
1418 #size-cells = <0>;