Lines Matching +full:dfsdm +full:- +full:dai
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
56 clk_hse: clk-hse {
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
62 clk_hsi: clk-hsi {
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <64000000>;
68 clk_lse: clk-lse {
69 #clock-cells = <0>;
70 compatible = "fixed-clock";
71 clock-frequency = <32768>;
74 clk_lsi: clk-lsi {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <32000>;
80 clk_csi: clk-csi {
81 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 clock-frequency = <4000000>;
87 thermal-zones {
88 cpu_thermal: cpu-thermal {
89 polling-delay-passive = <0>;
90 polling-delay = <0>;
91 thermal-sensors = <&dts>;
94 cpu_alert1: cpu-alert1 {
100 cpu-crit {
107 cooling-maps {
112 booster: regulator-booster {
113 compatible = "st,stm32mp1-booster";
119 compatible = "simple-bus";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 interrupt-parent = <&intc>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 compatible = "st,stm32-timers";
131 clock-names = "int";
137 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
141 compatible = "st,stm32-pwm";
142 #pwm-cells = <3>;
147 compatible = "st,stm32h7-timer-trigger";
153 compatible = "st,stm32-timer-counter";
159 #address-cells = <1>;
160 #size-cells = <0>;
161 compatible = "st,stm32-timers";
164 clock-names = "int";
171 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
175 compatible = "st,stm32-pwm";
176 #pwm-cells = <3>;
181 compatible = "st,stm32h7-timer-trigger";
187 compatible = "st,stm32-timer-counter";
193 #address-cells = <1>;
194 #size-cells = <0>;
195 compatible = "st,stm32-timers";
198 clock-names = "int";
203 dma-names = "ch1", "ch2", "ch3", "ch4";
207 compatible = "st,stm32-pwm";
208 #pwm-cells = <3>;
213 compatible = "st,stm32h7-timer-trigger";
219 compatible = "st,stm32-timer-counter";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "st,stm32-timers";
230 clock-names = "int";
237 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
241 compatible = "st,stm32-pwm";
242 #pwm-cells = <3>;
247 compatible = "st,stm32h7-timer-trigger";
253 compatible = "st,stm32-timer-counter";
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "st,stm32-timers";
264 clock-names = "int";
266 dma-names = "up";
270 compatible = "st,stm32h7-timer-trigger";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "st,stm32-timers";
282 clock-names = "int";
284 dma-names = "up";
288 compatible = "st,stm32h7-timer-trigger";
295 #address-cells = <1>;
296 #size-cells = <0>;
297 compatible = "st,stm32-timers";
300 clock-names = "int";
304 compatible = "st,stm32-pwm";
305 #pwm-cells = <3>;
310 compatible = "st,stm32h7-timer-trigger";
317 #address-cells = <1>;
318 #size-cells = <0>;
319 compatible = "st,stm32-timers";
322 clock-names = "int";
326 compatible = "st,stm32-pwm";
327 #pwm-cells = <3>;
332 compatible = "st,stm32h7-timer-trigger";
339 #address-cells = <1>;
340 #size-cells = <0>;
341 compatible = "st,stm32-timers";
344 clock-names = "int";
348 compatible = "st,stm32-pwm";
349 #pwm-cells = <3>;
354 compatible = "st,stm32h7-timer-trigger";
361 #address-cells = <1>;
362 #size-cells = <0>;
363 compatible = "st,stm32-lptimer";
366 clock-names = "mux";
370 compatible = "st,stm32-pwm-lp";
371 #pwm-cells = <3>;
376 compatible = "st,stm32-lptimer-trigger";
382 compatible = "st,stm32-lptimer-counter";
388 #address-cells = <1>;
389 #size-cells = <0>;
390 compatible = "st,stm32h7-spi";
397 dma-names = "rx", "tx";
401 i2s2: audio-controller@4000b000 {
402 compatible = "st,stm32h7-i2s";
403 #sound-dai-cells = <0>;
408 dma-names = "rx", "tx";
413 #address-cells = <1>;
414 #size-cells = <0>;
415 compatible = "st,stm32h7-spi";
422 dma-names = "rx", "tx";
426 i2s3: audio-controller@4000c000 {
427 compatible = "st,stm32h7-i2s";
428 #sound-dai-cells = <0>;
433 dma-names = "rx", "tx";
437 spdifrx: audio-controller@4000d000 {
438 compatible = "st,stm32h7-spdifrx";
439 #sound-dai-cells = <0>;
442 clock-names = "kclk";
446 dma-names = "rx", "rx-ctrl";
451 compatible = "st,stm32h7-uart";
459 compatible = "st,stm32h7-uart";
467 compatible = "st,stm32h7-uart";
475 compatible = "st,stm32h7-uart";
483 compatible = "st,stm32mp15-i2c";
485 interrupt-names = "event", "error";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 st,syscfg-fmp = <&syscfg 0x4 0x1>;
493 wakeup-source;
498 compatible = "st,stm32mp15-i2c";
500 interrupt-names = "event", "error";
505 #address-cells = <1>;
506 #size-cells = <0>;
507 st,syscfg-fmp = <&syscfg 0x4 0x2>;
508 wakeup-source;
513 compatible = "st,stm32mp15-i2c";
515 interrupt-names = "event", "error";
520 #address-cells = <1>;
521 #size-cells = <0>;
522 st,syscfg-fmp = <&syscfg 0x4 0x4>;
523 wakeup-source;
528 compatible = "st,stm32mp15-i2c";
530 interrupt-names = "event", "error";
535 #address-cells = <1>;
536 #size-cells = <0>;
537 st,syscfg-fmp = <&syscfg 0x4 0x10>;
538 wakeup-source;
543 compatible = "st,stm32-cec";
547 clock-names = "cec", "hdmi-cec";
552 compatible = "st,stm32h7-dac-core";
555 clock-names = "pclk";
556 #address-cells = <1>;
557 #size-cells = <0>;
561 compatible = "st,stm32-dac";
562 #io-channel-cells = <1>;
568 compatible = "st,stm32-dac";
569 #io-channel-cells = <1>;
576 compatible = "st,stm32h7-uart";
584 compatible = "st,stm32h7-uart";
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "st,stm32-timers";
597 clock-names = "int";
605 dma-names = "ch1", "ch2", "ch3", "ch4",
610 compatible = "st,stm32-pwm";
611 #pwm-cells = <3>;
616 compatible = "st,stm32h7-timer-trigger";
622 compatible = "st,stm32-timer-counter";
628 #address-cells = <1>;
629 #size-cells = <0>;
630 compatible = "st,stm32-timers";
633 clock-names = "int";
641 dma-names = "ch1", "ch2", "ch3", "ch4",
646 compatible = "st,stm32-pwm";
647 #pwm-cells = <3>;
652 compatible = "st,stm32h7-timer-trigger";
658 compatible = "st,stm32-timer-counter";
664 compatible = "st,stm32h7-uart";
672 #address-cells = <1>;
673 #size-cells = <0>;
674 compatible = "st,stm32h7-spi";
681 dma-names = "rx", "tx";
685 i2s1: audio-controller@44004000 {
686 compatible = "st,stm32h7-i2s";
687 #sound-dai-cells = <0>;
692 dma-names = "rx", "tx";
697 #address-cells = <1>;
698 #size-cells = <0>;
699 compatible = "st,stm32h7-spi";
706 dma-names = "rx", "tx";
711 #address-cells = <1>;
712 #size-cells = <0>;
713 compatible = "st,stm32-timers";
716 clock-names = "int";
721 dma-names = "ch1", "up", "trig", "com";
725 compatible = "st,stm32-pwm";
726 #pwm-cells = <3>;
731 compatible = "st,stm32h7-timer-trigger";
738 #address-cells = <1>;
739 #size-cells = <0>;
740 compatible = "st,stm32-timers";
743 clock-names = "int";
746 dma-names = "ch1", "up";
750 compatible = "st,stm32-pwm";
751 #pwm-cells = <3>;
755 compatible = "st,stm32h7-timer-trigger";
762 #address-cells = <1>;
763 #size-cells = <0>;
764 compatible = "st,stm32-timers";
767 clock-names = "int";
770 dma-names = "ch1", "up";
774 compatible = "st,stm32-pwm";
775 #pwm-cells = <3>;
780 compatible = "st,stm32h7-timer-trigger";
787 #address-cells = <1>;
788 #size-cells = <0>;
789 compatible = "st,stm32h7-spi";
796 dma-names = "rx", "tx";
801 compatible = "st,stm32h7-sai";
802 #address-cells = <1>;
803 #size-cells = <1>;
810 sai1a: audio-controller@4400a004 {
811 #sound-dai-cells = <0>;
813 compatible = "st,stm32-sai-sub-a";
816 clock-names = "sai_ck";
821 sai1b: audio-controller@4400a024 {
822 #sound-dai-cells = <0>;
823 compatible = "st,stm32-sai-sub-b";
826 clock-names = "sai_ck";
833 compatible = "st,stm32h7-sai";
834 #address-cells = <1>;
835 #size-cells = <1>;
842 sai2a: audio-controller@4400b004 {
843 #sound-dai-cells = <0>;
844 compatible = "st,stm32-sai-sub-a";
847 clock-names = "sai_ck";
852 sai2b: audio-controller@4400b024 {
853 #sound-dai-cells = <0>;
854 compatible = "st,stm32-sai-sub-b";
857 clock-names = "sai_ck";
864 compatible = "st,stm32h7-sai";
865 #address-cells = <1>;
866 #size-cells = <1>;
873 sai3a: audio-controller@4400c004 {
874 #sound-dai-cells = <0>;
875 compatible = "st,stm32-sai-sub-a";
878 clock-names = "sai_ck";
883 sai3b: audio-controller@4400c024 {
884 #sound-dai-cells = <0>;
885 compatible = "st,stm32-sai-sub-b";
888 clock-names = "sai_ck";
894 dfsdm: dfsdm@4400d000 { label
895 compatible = "st,stm32mp1-dfsdm";
898 clock-names = "dfsdm";
899 #address-cells = <1>;
900 #size-cells = <0>;
904 compatible = "st,stm32-dfsdm-adc";
905 #io-channel-cells = <1>;
909 dma-names = "rx";
914 compatible = "st,stm32-dfsdm-adc";
915 #io-channel-cells = <1>;
919 dma-names = "rx";
924 compatible = "st,stm32-dfsdm-adc";
925 #io-channel-cells = <1>;
929 dma-names = "rx";
934 compatible = "st,stm32-dfsdm-adc";
935 #io-channel-cells = <1>;
939 dma-names = "rx";
944 compatible = "st,stm32-dfsdm-adc";
945 #io-channel-cells = <1>;
949 dma-names = "rx";
954 compatible = "st,stm32-dfsdm-adc";
955 #io-channel-cells = <1>;
959 dma-names = "rx";
964 dma1: dma-controller@48000000 {
965 compatible = "st,stm32-dma";
977 #dma-cells = <4>;
979 dma-requests = <8>;
982 dma2: dma-controller@48001000 {
983 compatible = "st,stm32-dma";
995 #dma-cells = <4>;
997 dma-requests = <8>;
1000 dmamux1: dma-router@48002000 {
1001 compatible = "st,stm32h7-dmamux";
1003 #dma-cells = <3>;
1004 dma-requests = <128>;
1005 dma-masters = <&dma1 &dma2>;
1006 dma-channels = <16>;
1012 compatible = "st,stm32mp1-adc-core";
1017 clock-names = "bus", "adc";
1018 interrupt-controller;
1020 #interrupt-cells = <1>;
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1026 compatible = "st,stm32mp1-adc";
1027 #io-channel-cells = <1>;
1029 interrupt-parent = <&adc>;
1032 dma-names = "rx";
1037 compatible = "st,stm32mp1-adc";
1038 #io-channel-cells = <1>;
1040 interrupt-parent = <&adc>;
1043 dma-names = "rx";
1050 arm,primecell-periphid = <0x10153180>;
1053 interrupt-names = "cmd_irq";
1055 clock-names = "apb_pclk";
1057 cap-sd-highspeed;
1058 cap-mmc-highspeed;
1059 max-frequency = <120000000>;
1063 usbotg_hs: usb-otg@49000000 {
1064 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1067 clock-names = "otg";
1069 reset-names = "dwc2";
1071 g-rx-fifo-size = <256>;
1072 g-np-tx-fifo-size = <32>;
1073 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
1075 usb33d-supply = <&usb33>;
1080 compatible = "st,stm32mp1-ipcc";
1081 #mbox-cells = <1>;
1083 st,proc-id = <0>;
1084 interrupts-extended =
1088 interrupt-names = "rx", "tx", "wakeup";
1090 wakeup-source;
1095 compatible = "st,stm32-dcmi";
1100 clock-names = "mclk";
1102 dma-names = "tx";
1107 compatible = "st,stm32mp1-rcc", "syscon";
1109 #clock-cells = <1>;
1110 #reset-cells = <1>;
1114 compatible = "st,stm32mp1,pwr-reg";
1118 regulator-name = "reg11";
1119 regulator-min-microvolt = <1100000>;
1120 regulator-max-microvolt = <1100000>;
1124 regulator-name = "reg18";
1125 regulator-min-microvolt = <1800000>;
1126 regulator-max-microvolt = <1800000>;
1130 regulator-name = "usb33";
1131 regulator-min-microvolt = <3300000>;
1132 regulator-max-microvolt = <3300000>;
1137 compatible = "st,stm32mp151-pwr-mcu", "syscon";
1141 exti: interrupt-controller@5000d000 {
1142 compatible = "st,stm32mp1-exti", "syscon";
1143 interrupt-controller;
1144 #interrupt-cells = <2>;
1149 compatible = "st,stm32mp157-syscfg", "syscon";
1155 #address-cells = <1>;
1156 #size-cells = <0>;
1157 compatible = "st,stm32-lptimer";
1160 clock-names = "mux";
1164 compatible = "st,stm32-pwm-lp";
1165 #pwm-cells = <3>;
1170 compatible = "st,stm32-lptimer-trigger";
1176 compatible = "st,stm32-lptimer-counter";
1182 #address-cells = <1>;
1183 #size-cells = <0>;
1184 compatible = "st,stm32-lptimer";
1187 clock-names = "mux";
1191 compatible = "st,stm32-pwm-lp";
1192 #pwm-cells = <3>;
1197 compatible = "st,stm32-lptimer-trigger";
1204 compatible = "st,stm32-lptimer";
1207 clock-names = "mux";
1211 compatible = "st,stm32-pwm-lp";
1212 #pwm-cells = <3>;
1218 compatible = "st,stm32-lptimer";
1221 clock-names = "mux";
1225 compatible = "st,stm32-pwm-lp";
1226 #pwm-cells = <3>;
1232 compatible = "st,stm32-vrefbuf";
1234 regulator-min-microvolt = <1500000>;
1235 regulator-max-microvolt = <2500000>;
1241 compatible = "st,stm32h7-sai";
1242 #address-cells = <1>;
1243 #size-cells = <1>;
1250 sai4a: audio-controller@50027004 {
1251 #sound-dai-cells = <0>;
1252 compatible = "st,stm32-sai-sub-a";
1255 clock-names = "sai_ck";
1260 sai4b: audio-controller@50027024 {
1261 #sound-dai-cells = <0>;
1262 compatible = "st,stm32-sai-sub-b";
1265 clock-names = "sai_ck";
1272 compatible = "st,stm32-thermal";
1276 clock-names = "pclk";
1277 #thermal-sensor-cells = <0>;
1282 compatible = "st,stm32f756-hash";
1288 dma-names = "in";
1289 dma-maxburst = <2>;
1294 compatible = "st,stm32-rng";
1301 mdma1: dma-controller@58000000 {
1302 compatible = "st,stm32h7-mdma";
1307 #dma-cells = <5>;
1308 dma-channels = <32>;
1309 dma-requests = <48>;
1312 fmc: memory-controller@58002000 {
1313 #address-cells = <2>;
1314 #size-cells = <1>;
1315 compatible = "st,stm32mp1-fmc2-ebi";
1327 nand-controller@4,0 {
1328 #address-cells = <1>;
1329 #size-cells = <0>;
1330 compatible = "st,stm32mp1-fmc2-nfc";
1341 dma-names = "tx", "rx", "ecc";
1347 compatible = "st,stm32f469-qspi";
1349 reg-names = "qspi", "qspi_mm";
1353 dma-names = "tx", "rx";
1356 #address-cells = <1>;
1357 #size-cells = <0>;
1363 arm,primecell-periphid = <0x10153180>;
1366 interrupt-names = "cmd_irq";
1368 clock-names = "apb_pclk";
1370 cap-sd-highspeed;
1371 cap-mmc-highspeed;
1372 max-frequency = <120000000>;
1378 arm,primecell-periphid = <0x10153180>;
1381 interrupt-names = "cmd_irq";
1383 clock-names = "apb_pclk";
1385 cap-sd-highspeed;
1386 cap-mmc-highspeed;
1387 max-frequency = <120000000>;
1392 compatible = "st,stm32f7-crc";
1398 stmmac_axi_config_0: stmmac-axi-config {
1405 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1407 reg-names = "stmmaceth";
1408 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1409 interrupt-names = "macirq";
1410 clock-names = "stmmaceth",
1411 "mac-clk-tx",
1412 "mac-clk-rx",
1413 "eth-ck",
1421 snps,mixed-burst;
1423 snps,en-tx-lpi-clockgating;
1424 snps,axi-config = <&stmmac_axi_config_0>;
1429 usbh_ohci: usbh-ohci@5800c000 {
1430 compatible = "generic-ohci";
1438 usbh_ehci: usbh-ehci@5800d000 {
1439 compatible = "generic-ehci";
1448 ltdc: display-controller@5a001000 {
1449 compatible = "st,stm32-ltdc";
1454 clock-names = "lcd";
1459 #address-cells = <1>;
1460 #size-cells = <0>;
1465 compatible = "st,stm32mp1-iwdg";
1468 clock-names = "pclk", "lsi";
1473 #address-cells = <1>;
1474 #size-cells = <0>;
1475 compatible = "st,stm32mp1-usbphyc";
1481 usbphyc_port0: usb-phy@0 {
1482 #phy-cells = <0>;
1486 usbphyc_port1: usb-phy@1 {
1487 #phy-cells = <1>;
1493 compatible = "st,stm32h7-uart";
1501 #address-cells = <1>;
1502 #size-cells = <0>;
1503 compatible = "st,stm32h7-spi";
1510 dma-names = "rx", "tx";
1515 compatible = "st,stm32mp15-i2c";
1517 interrupt-names = "event", "error";
1522 #address-cells = <1>;
1523 #size-cells = <0>;
1524 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1525 wakeup-source;
1530 compatible = "st,stm32mp1-rtc";
1533 clock-names = "pclk", "rtc_ck";
1539 compatible = "st,stm32mp15-bsec";
1541 #address-cells = <1>;
1542 #size-cells = <1>;
1552 compatible = "st,stm32mp15-i2c";
1554 interrupt-names = "event", "error";
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1561 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1562 wakeup-source;
1570 pinctrl: pin-controller@50002000 {
1571 #address-cells = <1>;
1572 #size-cells = <1>;
1573 compatible = "st,stm32mp157-pinctrl";
1575 interrupt-parent = <&exti>;
1577 pins-are-numbered;
1580 gpio-controller;
1581 #gpio-cells = <2>;
1582 interrupt-controller;
1583 #interrupt-cells = <2>;
1586 st,bank-name = "GPIOA";
1591 gpio-controller;
1592 #gpio-cells = <2>;
1593 interrupt-controller;
1594 #interrupt-cells = <2>;
1597 st,bank-name = "GPIOB";
1602 gpio-controller;
1603 #gpio-cells = <2>;
1604 interrupt-controller;
1605 #interrupt-cells = <2>;
1608 st,bank-name = "GPIOC";
1613 gpio-controller;
1614 #gpio-cells = <2>;
1615 interrupt-controller;
1616 #interrupt-cells = <2>;
1619 st,bank-name = "GPIOD";
1624 gpio-controller;
1625 #gpio-cells = <2>;
1626 interrupt-controller;
1627 #interrupt-cells = <2>;
1630 st,bank-name = "GPIOE";
1635 gpio-controller;
1636 #gpio-cells = <2>;
1637 interrupt-controller;
1638 #interrupt-cells = <2>;
1641 st,bank-name = "GPIOF";
1646 gpio-controller;
1647 #gpio-cells = <2>;
1648 interrupt-controller;
1649 #interrupt-cells = <2>;
1652 st,bank-name = "GPIOG";
1657 gpio-controller;
1658 #gpio-cells = <2>;
1659 interrupt-controller;
1660 #interrupt-cells = <2>;
1663 st,bank-name = "GPIOH";
1668 gpio-controller;
1669 #gpio-cells = <2>;
1670 interrupt-controller;
1671 #interrupt-cells = <2>;
1674 st,bank-name = "GPIOI";
1679 gpio-controller;
1680 #gpio-cells = <2>;
1681 interrupt-controller;
1682 #interrupt-cells = <2>;
1685 st,bank-name = "GPIOJ";
1690 gpio-controller;
1691 #gpio-cells = <2>;
1692 interrupt-controller;
1693 #interrupt-cells = <2>;
1696 st,bank-name = "GPIOK";
1701 pinctrl_z: pin-controller-z@54004000 {
1702 #address-cells = <1>;
1703 #size-cells = <1>;
1704 compatible = "st,stm32mp157-z-pinctrl";
1706 pins-are-numbered;
1707 interrupt-parent = <&exti>;
1711 gpio-controller;
1712 #gpio-cells = <2>;
1713 interrupt-controller;
1714 #interrupt-cells = <2>;
1717 st,bank-name = "GPIOZ";
1718 st,bank-ioport = <11>;
1725 compatible = "st,mlahb", "simple-bus";
1726 #address-cells = <1>;
1727 #size-cells = <1>;
1729 dma-ranges = <0x00000000 0x38000000 0x10000>,
1734 compatible = "st,stm32mp1-m4";
1739 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1740 st,syscfg-tz = <&rcc 0x000 0x1>;
1741 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;