Lines Matching +full:0 +full:xff400000
23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
75 <0 105 4>,
76 <0 106 4>,
77 <0 107 4>,
78 <0 108 4>,
79 <0 109 4>,
80 <0 110 4>,
81 <0 111 4>;
96 #address-cells = <0x1>;
97 #size-cells = <0x1>;
102 reg = <0xffc00000 0x1000>;
103 interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
111 reg = <0xffc01000 0x1000>;
112 interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
120 reg = <0xffd04000 0x1000>;
124 #size-cells = <0>;
127 #clock-cells = <0>;
132 #clock-cells = <0>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
148 #size-cells = <0>;
149 #clock-cells = <0>;
152 reg = <0x40>;
155 #clock-cells = <0>;
158 div-reg = <0xe0 0 9>;
159 reg = <0x48>;
163 #clock-cells = <0>;
166 div-reg = <0xe4 0 9>;
167 reg = <0x4C>;
171 #clock-cells = <0>;
174 div-reg = <0xe8 0 9>;
175 reg = <0x50>;
179 #clock-cells = <0>;
182 reg = <0x54>;
186 #clock-cells = <0>;
189 reg = <0x58>;
193 #clock-cells = <0>;
196 reg = <0x5C>;
202 #size-cells = <0>;
203 #clock-cells = <0>;
206 reg = <0x80>;
209 #clock-cells = <0>;
212 reg = <0x88>;
216 #clock-cells = <0>;
219 reg = <0x8C>;
223 #clock-cells = <0>;
226 reg = <0x90>;
230 #clock-cells = <0>;
233 reg = <0x94>;
237 #clock-cells = <0>;
240 reg = <0x98>;
244 #clock-cells = <0>;
247 reg = <0x9C>;
253 #size-cells = <0>;
254 #clock-cells = <0>;
257 reg = <0xC0>;
260 #clock-cells = <0>;
263 reg = <0xC8>;
267 #clock-cells = <0>;
270 reg = <0xCC>;
274 #clock-cells = <0>;
277 reg = <0xD0>;
281 #clock-cells = <0>;
284 reg = <0xD4>;
289 #clock-cells = <0>;
296 #clock-cells = <0>;
303 #clock-cells = <0>;
306 clk-gate = <0x60 0>;
310 #clock-cells = <0>;
317 #clock-cells = <0>;
320 div-reg = <0x64 0 2>;
321 clk-gate = <0x60 1>;
325 #clock-cells = <0>;
328 div-reg = <0x64 2 2>;
332 #clock-cells = <0>;
335 div-reg = <0x64 4 3>;
336 clk-gate = <0x60 2>;
340 #clock-cells = <0>;
343 div-reg = <0x64 7 3>;
344 clk-gate = <0x60 3>;
348 #clock-cells = <0>;
351 div-reg = <0x68 0 2>;
352 clk-gate = <0x60 4>;
356 #clock-cells = <0>;
359 div-reg = <0x68 2 2>;
360 clk-gate = <0x60 5>;
364 #clock-cells = <0>;
367 div-reg = <0x6C 0 3>;
368 clk-gate = <0x60 6>;
372 #clock-cells = <0>;
375 clk-gate = <0x60 7>;
379 #clock-cells = <0>;
382 clk-gate = <0x60 8>;
386 #clock-cells = <0>;
389 clk-gate = <0x60 9>;
393 #clock-cells = <0>;
396 clk-gate = <0xa0 0>;
400 #clock-cells = <0>;
403 clk-gate = <0xa0 1>;
407 #clock-cells = <0>;
410 clk-gate = <0xa0 2>;
411 div-reg = <0xa4 0 3>;
415 #clock-cells = <0>;
418 clk-gate = <0xa0 3>;
419 div-reg = <0xa4 3 3>;
423 #clock-cells = <0>;
426 clk-gate = <0xa0 4>;
427 div-reg = <0xa4 6 3>;
431 #clock-cells = <0>;
434 clk-gate = <0xa0 5>;
435 div-reg = <0xa4 9 3>;
439 #clock-cells = <0>;
442 clk-gate = <0xa0 6>;
443 div-reg = <0xa8 0 24>;
447 #clock-cells = <0>;
450 clk-gate = <0xa0 7>;
454 #clock-cells = <0>;
457 clk-gate = <0xa0 8>;
458 clk-phase = <0 135>;
462 #clock-cells = <0>;
465 clk-gate = <0xa0 8>;
470 #clock-cells = <0>;
473 clk-gate = <0xa0 9>;
477 #clock-cells = <0>;
480 clk-gate = <0xa0 9>;
484 #clock-cells = <0>;
487 clk-gate = <0xa0 10>;
492 #clock-cells = <0>;
495 clk-gate = <0xa0 11>;
499 #clock-cells = <0>;
502 clk-gate = <0xd8 0>;
506 #clock-cells = <0>;
509 clk-gate = <0xd8 1>;
513 #clock-cells = <0>;
516 clk-gate = <0xd8 2>;
520 #clock-cells = <0>;
523 clk-gate = <0xd8 3>;
531 reg = <0xff400000 0x100000>;
539 reg = <0xff500000 0x10000>;
547 reg = <0xff600000 0x100000>;
555 reg = <0xffc25080 0x4>;
561 reg = <0xff706000 0x1000
562 0xffb90000 0x4>;
563 interrupts = <0 175 4>;
568 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
569 reg = <0xff700000 0x2000>;
570 interrupts = <0 115 4>;
586 altr,sysmgr-syscon = <&sysmgr 0x60 2>;
587 reg = <0xff702000 0x2000>;
588 interrupts = <0 120 4>;
604 #size-cells = <0>;
606 reg = <0xff708000 0x1000>;
611 porta: gpio-controller@0 {
616 reg = <0>;
619 interrupts = <0 164 4>;
625 #size-cells = <0>;
627 reg = <0xff709000 0x1000>;
632 portb: gpio-controller@0 {
637 reg = <0>;
640 interrupts = <0 165 4>;
646 #size-cells = <0>;
648 reg = <0xff70a000 0x1000>;
653 portc: gpio-controller@0 {
658 reg = <0>;
661 interrupts = <0 166 4>;
667 #size-cells = <0>;
669 reg = <0xffc04000 0x1000>;
672 interrupts = <0 158 0x4>;
678 #size-cells = <0>;
680 reg = <0xffc05000 0x1000>;
683 interrupts = <0 159 0x4>;
689 #size-cells = <0>;
691 reg = <0xffc06000 0x1000>;
694 interrupts = <0 160 0x4>;
700 #size-cells = <0>;
702 reg = <0xffc07000 0x1000>;
705 interrupts = <0 161 0x4>;
717 reg = <0xffd08140 0x4>;
718 interrupts = <0 36 1>, <0 37 1>;
723 reg = <0xffd08144 0x4>;
725 interrupts = <0 178 1>, <0 179 1>;
731 reg = <0xfffef000 0x1000>;
732 interrupts = <0 38 0x04>;
741 arm,double-linefill-incr = <0>;
743 arm,prefetch-drop = <0>;
747 l3regs@0xff800000 {
749 reg = <0xff800000 0x1000>;
754 reg = <0xff704000 0x1000>;
755 interrupts = <0 139 4>;
756 fifo-depth = <0x400>;
758 #size-cells = <0>;
766 #address-cells = <0x1>;
767 #size-cells = <0x0>;
769 reg = <0xff900000 0x100000>,
770 <0xffb80000 0x10000>;
772 interrupts = <0x0 0x90 0x4>;
781 reg = <0xffff0000 0x10000>;
787 #size-cells = <0>;
788 reg = <0xff705000 0x1000>,
789 <0xffa00000 0x1000>;
790 interrupts = <0 151 4>;
793 cdns,trigger-address = <0x00000000>;
802 reg = <0xffd05000 0x1000>;
803 altr,modrst-offset = <0x10>;
808 reg = <0xfffec000 0x100>;
813 reg = <0xffc25000 0x1000>;
820 interrupts = <0 39 4>;
826 #size-cells = <0>;
827 reg = <0xfff00000 0x1000>;
828 interrupts = <0 154 4>;
839 #size-cells = <0>;
840 reg = <0xfff01000 0x1000>;
841 interrupts = <0 155 4>;
851 reg = <0xffd08000 0x4000>;
857 reg = <0xfffec600 0x100>;
858 interrupts = <1 13 0xf01>;
864 interrupts = <0 167 4>;
865 reg = <0xffc08000 0x1000>;
874 interrupts = <0 168 4>;
875 reg = <0xffc09000 0x1000>;
884 interrupts = <0 169 4>;
885 reg = <0xffd00000 0x1000>;
894 interrupts = <0 170 4>;
895 reg = <0xffd01000 0x1000>;
904 reg = <0xffc02000 0x1000>;
905 interrupts = <0 162 4>;
917 reg = <0xffc03000 0x1000>;
918 interrupts = <0 163 4>;
929 #phy-cells = <0>;
936 reg = <0xffb00000 0xffff>;
937 interrupts = <0 125 4>;
949 reg = <0xffb40000 0xffff>;
950 interrupts = <0 128 4>;
962 reg = <0xffd02000 0x1000>;
963 interrupts = <0 171 4>;
971 reg = <0xffd03000 0x1000>;
972 interrupts = <0 172 4>;