Lines Matching refs:clocks
82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
94 clocks: clock-controller@e0100000 { label
98 clocks = <&xxti>, <&xusbxti>;
125 clocks = <&clocks CLK_PDMA0>;
137 clocks = <&clocks CLK_PDMA1>;
149 clocks = <&clocks CLK_TSADC>;
163 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
179 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
193 clocks = <&clocks CLK_KEYIF>;
203 clocks = <&clocks CLK_I2C0>;
217 clocks = <&clocks CLK_I2C2>;
232 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
233 <&clocks FOUT_EPLL>,
234 <&clocks SCLK_AUDIO0>;
248 clocks = <&clk_audss CLK_I2S>,
266 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
281 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
294 clocks = <&clocks CLK_PWM>;
304 clocks = <&clocks CLK_WDT>;
312 clocks = <&clocks CLK_RTC>;
324 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
325 <&clocks SCLK_UART0>;
336 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
337 <&clocks SCLK_UART1>;
348 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
349 <&clocks SCLK_UART2>;
360 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
361 <&clocks SCLK_UART3>;
371 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
372 <&clocks SCLK_MMC0>;
382 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
383 <&clocks SCLK_MMC1>;
393 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
394 <&clocks SCLK_MMC2>;
404 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
405 <&clocks SCLK_MMC3>;
414 clocks = <&clocks CLK_USB_OTG>;
425 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
436 clocks = <&clocks CLK_USB_HOST>;
453 clocks = <&clocks CLK_USB_HOST>;
470 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
508 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
528 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
537 clocks = <&clocks CLK_MDMA>;
549 clocks = <&clocks CLK_ROTATOR>;
558 clocks = <&clocks CLK_I2C1>;
571 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
584 clocks = <&clocks CLK_CSIS>,
585 <&clocks SCLK_CSIS>;
599 clocks = <&clocks CLK_FIMC0>,
600 <&clocks SCLK_FIMC0>;
613 clocks = <&clocks CLK_FIMC1>,
614 <&clocks SCLK_FIMC1>;
629 clocks = <&clocks CLK_FIMC2>,
630 <&clocks SCLK_FIMC2>;
645 clocks = <&clocks CLK_JPEG>;