Lines Matching +full:0 +full:xff680000
53 #size-cells = <0>;
60 reg = <0x500>;
71 reg = <0x501>;
82 reg = <0x502>;
93 reg = <0x503>;
165 reg = <0x0 0xff250000 0x0 0x4000>;
177 reg = <0x0 0xff600000 0x0 0x4000>;
178 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
190 reg = <0x0 0xffb20000 0x0 0x4000>;
191 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
207 * The rk3288 cannot use the memory area above 0xfe000000
217 reg = <0x0 0xfe000000 0x0 0x1000000>;
225 #clock-cells = <0>;
241 reg = <0x0 0xff810000 0x0 0x20>;
258 fifo-depth = <0x100>;
260 reg = <0x0 0xff0c0000 0x0 0x4000>;
272 fifo-depth = <0x100>;
274 reg = <0x0 0xff0d0000 0x0 0x4000>;
286 fifo-depth = <0x100>;
288 reg = <0x0 0xff0e0000 0x0 0x4000>;
300 fifo-depth = <0x100>;
302 reg = <0x0 0xff0f0000 0x0 0x4000>;
310 reg = <0x0 0xff100000 0x0 0x100>;
328 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
329 reg = <0x0 0xff110000 0x0 0x1000>;
331 #size-cells = <0>;
343 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
344 reg = <0x0 0xff120000 0x0 0x1000>;
346 #size-cells = <0>;
358 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
359 reg = <0x0 0xff130000 0x0 0x1000>;
361 #size-cells = <0>;
367 reg = <0x0 0xff140000 0x0 0x1000>;
370 #size-cells = <0>;
374 pinctrl-0 = <&i2c1_xfer>;
380 reg = <0x0 0xff150000 0x0 0x1000>;
383 #size-cells = <0>;
387 pinctrl-0 = <&i2c3_xfer>;
393 reg = <0x0 0xff160000 0x0 0x1000>;
396 #size-cells = <0>;
400 pinctrl-0 = <&i2c4_xfer>;
406 reg = <0x0 0xff170000 0x0 0x1000>;
409 #size-cells = <0>;
413 pinctrl-0 = <&i2c5_xfer>;
419 reg = <0x0 0xff180000 0x0 0x100>;
428 pinctrl-0 = <&uart0_xfer>;
434 reg = <0x0 0xff190000 0x0 0x100>;
443 pinctrl-0 = <&uart1_xfer>;
449 reg = <0x0 0xff690000 0x0 0x100>;
456 pinctrl-0 = <&uart2_xfer>;
462 reg = <0x0 0xff1b0000 0x0 0x100>;
471 pinctrl-0 = <&uart3_xfer>;
477 reg = <0x0 0xff1c0000 0x0 0x100>;
486 pinctrl-0 = <&uart4_xfer>;
495 thermal-sensors = <&tsadc 0>;
573 reg = <0x0 0xff280000 0x0 0x100>;
580 pinctrl-0 = <&otp_pin>;
591 reg = <0x0 0xff290000 0x0 0x10000>;
611 reg = <0x0 0xff500000 0x0 0x100>;
622 reg = <0x0 0xff520000 0x0 0x100>;
633 reg = <0x0 0xff540000 0x0 0x40000>;
647 reg = <0x0 0xff580000 0x0 0x40000>;
662 reg = <0x0 0xff5c0000 0x0 0x100>;
670 reg = <0x0 0xff650000 0x0 0x1000>;
673 #size-cells = <0>;
677 pinctrl-0 = <&i2c0_xfer>;
683 reg = <0x0 0xff660000 0x0 0x1000>;
686 #size-cells = <0>;
690 pinctrl-0 = <&i2c2_xfer>;
696 reg = <0x0 0xff680000 0x0 0x10>;
699 pinctrl-0 = <&pwm0_pin>;
707 reg = <0x0 0xff680010 0x0 0x10>;
710 pinctrl-0 = <&pwm1_pin>;
718 reg = <0x0 0xff680020 0x0 0x10>;
721 pinctrl-0 = <&pwm2_pin>;
729 reg = <0x0 0xff680030 0x0 0x10>;
732 pinctrl-0 = <&pwm3_pin>;
740 reg = <0x0 0xff700000 0x0 0x18000>;
743 ranges = <0 0x0 0xff700000 0x18000>;
744 smp-sram@0 {
746 reg = <0x00 0x10>;
752 reg = <0x0 0xff720000 0x0 0x1000>;
757 reg = <0x0 0xff730000 0x0 0x100>;
763 #size-cells = <0>;
868 offset = <0x94>;
878 reg = <0x0 0xff740000 0x0 0x1000>;
883 reg = <0x0 0xff760000 0x0 0x1000>;
901 reg = <0x0 0xff770000 0x0 0x1000>;
907 #phy-cells = <0>;
919 #size-cells = <0>;
923 #phy-cells = <0>;
924 reg = <0x320>;
927 #clock-cells = <0>;
933 #phy-cells = <0>;
934 reg = <0x334>;
937 #clock-cells = <0>;
943 #phy-cells = <0>;
944 reg = <0x348>;
947 #clock-cells = <0>;
956 reg = <0x0 0xff800000 0x0 0x100>;
964 reg = <0x0 0xff8b0000 0x0 0x10000>;
965 #sound-dai-cells = <0>;
972 pinctrl-0 = <&spdif_tx>;
979 reg = <0x0 0xff890000 0x0 0x10000>;
980 #sound-dai-cells = <0>;
984 dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;
987 pinctrl-0 = <&i2s0_bus>;
995 reg = <0x0 0xff8a0000 0x0 0x4000>;
1007 reg = <0x0 0xff900800 0x0 0x40>;
1012 #iommu-cells = <0>;
1018 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1023 #iommu-cells = <0>;
1030 reg = <0x0 0xff920000 0x0 0x180>;
1041 reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
1053 #size-cells = <0>;
1055 vopb_out_hdmi: endpoint@0 {
1056 reg = <0>;
1079 reg = <0x0 0xff930300 0x0 0x100>;
1085 #iommu-cells = <0>;
1091 reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
1103 #size-cells = <0>;
1105 vopl_out_hdmi: endpoint@0 {
1106 reg = <0>;
1129 reg = <0x0 0xff940300 0x0 0x100>;
1135 #iommu-cells = <0>;
1141 reg = <0x0 0xff960000 0x0 0x4000>;
1152 #size-cells = <0>;
1153 mipi_in_vopb: endpoint@0 {
1154 reg = <0>;
1167 reg = <0x0 0xff96c000 0x0 0x4000>;
1171 pinctrl-0 = <&lcdc_ctl>;
1178 #size-cells = <0>;
1180 lvds_in: port@0 {
1181 reg = <0>;
1184 #size-cells = <0>;
1186 lvds_in_vopb: endpoint@0 {
1187 reg = <0>;
1200 reg = <0x0 0xff970000 0x0 0x4000>;
1213 #size-cells = <0>;
1214 edp_in: port@0 {
1215 reg = <0>;
1217 #size-cells = <0>;
1218 edp_in_vopb: endpoint@0 {
1219 reg = <0>;
1232 reg = <0x0 0xff980000 0x0 0x20000>;
1234 #sound-dai-cells = <0>;
1245 #size-cells = <0>;
1246 hdmi_in_vopb: endpoint@0 {
1247 reg = <0>;
1260 reg = <0x0 0xff9a0000 0x0 0x800>;
1272 reg = <0x0 0xff9a0800 0x0 0x100>;
1277 #iommu-cells = <0>;
1283 reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
1288 #iommu-cells = <0>;
1294 reg = <0x0 0xffa30000 0x0 0x10000>;
1333 reg = <0x0 0xffaa0000 0x0 0x20>;
1338 reg = <0x0 0xffaa0080 0x0 0x20>;
1343 reg = <0x0 0xffad0000 0x0 0x20>;
1348 reg = <0x0 0xffad0100 0x0 0x20>;
1353 reg = <0x0 0xffad0180 0x0 0x20>;
1358 reg = <0x0 0xffad0400 0x0 0x20>;
1363 reg = <0x0 0xffad0480 0x0 0x20>;
1368 reg = <0x0 0xffad0500 0x0 0x20>;
1373 reg = <0x0 0xffad0800 0x0 0x20>;
1378 reg = <0x0 0xffad0880 0x0 0x20>;
1383 reg = <0x0 0xffad0900 0x0 0x20>;
1388 reg = <0x0 0xffae0000 0x0 0x20>;
1393 reg = <0x0 0xffaf0000 0x0 0x20>;
1398 reg = <0x0 0xffaf0080 0x0 0x20>;
1403 reg = <0x0 0xffb40000 0x0 0x20>;
1410 reg = <0x07 0x10>;
1413 reg = <0x17 0x1>;
1421 #address-cells = <0>;
1423 reg = <0x0 0xffc01000 0x0 0x1000>,
1424 <0x0 0xffc02000 0x0 0x2000>,
1425 <0x0 0xffc04000 0x0 0x2000>,
1426 <0x0 0xffc06000 0x0 0x2000>;
1427 interrupts = <GIC_PPI 9 0xf04>;
1440 reg = <0x0 0xff750000 0x0 0x100>;
1453 reg = <0x0 0xff780000 0x0 0x100>;
1466 reg = <0x0 0xff790000 0x0 0x100>;
1479 reg = <0x0 0xff7a0000 0x0 0x100>;
1492 reg = <0x0 0xff7b0000 0x0 0x100>;
1505 reg = <0x0 0xff7c0000 0x0 0x100>;
1518 reg = <0x0 0xff7d0000 0x0 0x100>;
1531 reg = <0x0 0xff7e0000 0x0 0x100>;
1544 reg = <0x0 0xff7f0000 0x0 0x100>;
1598 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
1602 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
1606 rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
1610 rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
1622 rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>,
1623 <0 RK_PC0 1 &pcfg_pull_none>;
1945 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
1949 rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>;