Lines Matching +full:0 +full:xfe928000
34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
57 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #size-cells = <0>;
67 cpu0: cpu@0 {
70 reg = <0>;
87 L2_CA7: cache-controller-0 {
98 #clock-cells = <0>;
100 clock-frequency = <0>;
113 #clock-cells = <0>;
115 clock-frequency = <0>;
129 reg = <0 0xe6020000 0 0x0c>;
139 reg = <0 0xe6050000 0 0x50>;
143 gpio-ranges = <&pfc 0 0 32>;
154 reg = <0 0xe6051000 0 0x50>;
158 gpio-ranges = <&pfc 0 32 26>;
169 reg = <0 0xe6052000 0 0x50>;
173 gpio-ranges = <&pfc 0 64 32>;
184 reg = <0 0xe6053000 0 0x50>;
188 gpio-ranges = <&pfc 0 96 32>;
199 reg = <0 0xe6054000 0 0x50>;
203 gpio-ranges = <&pfc 0 128 32>;
214 reg = <0 0xe6055000 0 0x50>;
218 gpio-ranges = <&pfc 0 160 28>;
229 reg = <0 0xe6055400 0 0x50>;
233 gpio-ranges = <&pfc 0 192 26>;
243 reg = <0 0xe6060000 0 0x11c>;
248 reg = <0 0xe6150000 0 0x1000>;
252 #power-domain-cells = <0>;
258 reg = <0 0xe6151000 0 0x188>;
264 reg = <0 0xe6160000 0 0x0100>;
269 reg = <0 0xe6180000 0 0x0200>;
277 reg = <0 0xe61c0000 0 0x200>;
278 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
296 reg = <0 0xe6280000 0 0x1000>;
306 reg = <0 0xe6290000 0 0x1000>;
315 reg = <0 0xe6740000 0 0x1000>;
325 reg = <0 0xec680000 0 0x1000>;
334 reg = <0 0xfe951000 0 0x1000>;
344 reg = <0 0xe62a0000 0 0x1000>;
353 reg = <0 0xe63a0000 0 0x12000>;
356 ranges = <0 0 0xe63a0000 0x12000>;
361 reg = <0 0xe63c0000 0 0x1000>;
364 ranges = <0 0 0xe63c0000 0x1000>;
366 smp-sram@0 {
368 reg = <0 0x100>;
378 reg = <0 0xe6508000 0 0x40>;
384 #size-cells = <0>;
392 reg = <0 0xe6518000 0 0x40>;
398 #size-cells = <0>;
406 reg = <0 0xe6530000 0 0x40>;
412 #size-cells = <0>;
420 reg = <0 0xe6540000 0 0x40>;
426 #size-cells = <0>;
434 reg = <0 0xe6520000 0 0x40>;
440 #size-cells = <0>;
448 reg = <0 0xe6528000 0 0x40>;
454 #size-cells = <0>;
463 reg = <0 0xe6500000 0 0x425>;
466 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
467 <&dmac1 0x61>, <&dmac1 0x62>;
472 #size-cells = <0>;
480 reg = <0 0xe6510000 0 0x425>;
483 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
484 <&dmac1 0x65>, <&dmac1 0x66>;
489 #size-cells = <0>;
496 reg = <0 0xe6590000 0 0x100>;
510 reg = <0 0xe6590100 0 0x100>;
512 #size-cells = <0>;
519 usb0: usb-channel@0 {
520 reg = <0>;
532 reg = <0 0xe6700000 0 0x20000>;
565 reg = <0 0xe6720000 0 0x20000>;
598 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
604 #size-cells = <0>;
610 reg = <0 0xe6b10000 0 0x2c>;
613 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
614 <&dmac1 0x17>, <&dmac1 0x18>;
620 #size-cells = <0>;
627 reg = <0 0xe6c40000 0 64>;
631 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
632 <&dmac1 0x21>, <&dmac1 0x22>;
642 reg = <0 0xe6c50000 0 64>;
646 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
647 <&dmac1 0x25>, <&dmac1 0x26>;
657 reg = <0 0xe6c60000 0 64>;
661 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
662 <&dmac1 0x27>, <&dmac1 0x28>;
672 reg = <0 0xe6c70000 0 64>;
676 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
677 <&dmac1 0x1b>, <&dmac1 0x1c>;
687 reg = <0 0xe6c78000 0 64>;
691 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
692 <&dmac1 0x1f>, <&dmac1 0x20>;
702 reg = <0 0xe6c80000 0 64>;
706 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
707 <&dmac1 0x23>, <&dmac1 0x24>;
717 reg = <0 0xe6c20000 0 0x100>;
721 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
722 <&dmac1 0x3d>, <&dmac1 0x3e>;
732 reg = <0 0xe6c30000 0 0x100>;
736 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
737 <&dmac1 0x19>, <&dmac1 0x1a>;
747 reg = <0 0xe6ce0000 0 0x100>;
751 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
752 <&dmac1 0x1d>, <&dmac1 0x1e>;
763 reg = <0 0xe6e60000 0 64>;
768 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
769 <&dmac1 0x29>, <&dmac1 0x2a>;
780 reg = <0 0xe6e68000 0 64>;
785 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
786 <&dmac1 0x2d>, <&dmac1 0x2e>;
796 reg = <0 0xe6e58000 0 64>;
801 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
802 <&dmac1 0x2b>, <&dmac1 0x2c>;
812 reg = <0 0xe6ea8000 0 64>;
817 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
818 <&dmac1 0x2f>, <&dmac1 0x30>;
828 reg = <0 0xe6ee0000 0 64>;
833 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
834 <&dmac1 0xfb>, <&dmac1 0xfc>;
844 reg = <0 0xe6ee8000 0 64>;
849 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
850 <&dmac1 0xfd>, <&dmac1 0xfe>;
860 reg = <0 0xe62c0000 0 96>;
865 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
866 <&dmac1 0x39>, <&dmac1 0x3a>;
876 reg = <0 0xe62c8000 0 96>;
881 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
882 <&dmac1 0x4d>, <&dmac1 0x4e>;
892 reg = <0 0xe62d0000 0 96>;
897 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
898 <&dmac1 0x3b>, <&dmac1 0x3c>;
908 reg = <0 0xe6e80000 0 0x1000>;
921 reg = <0 0xe6e88000 0 0x1000>;
934 reg = <0 0xe6ef0000 0 0x1000>;
945 reg = <0 0xe6ef1000 0 0x1000>;
957 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
962 reg = <0 0xec500000 0 0x1000>, /* SCU */
963 <0 0xec5a0000 0 0x100>, /* ADG */
964 <0 0xec540000 0 0x1000>, /* SSIU */
965 <0 0xec541000 0 0x280>, /* SSI */
966 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
986 "ssi.1", "ssi.0",
989 "ctu.0", "ctu.1",
990 "mix.0", "mix.1",
991 "dvc.0", "dvc.1",
1003 "ssi.1", "ssi.0";
1008 dvc0: dvc-0 {
1009 dmas = <&audma0 0xbc>;
1013 dmas = <&audma0 0xbe>;
1019 mix0: mix-0 { };
1024 ctu00: ctu-0 { };
1035 src-0 {
1040 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1045 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1050 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1055 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1060 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1065 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1071 ssi0: ssi-0 {
1073 dmas = <&audma0 0x01>, <&audma0 0x02>,
1074 <&audma0 0x15>, <&audma0 0x16>;
1079 dmas = <&audma0 0x03>, <&audma0 0x04>,
1080 <&audma0 0x49>, <&audma0 0x4a>;
1085 dmas = <&audma0 0x05>, <&audma0 0x06>,
1086 <&audma0 0x63>, <&audma0 0x64>;
1091 dmas = <&audma0 0x07>, <&audma0 0x08>,
1092 <&audma0 0x6f>, <&audma0 0x70>;
1097 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1098 <&audma0 0x71>, <&audma0 0x72>;
1103 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1104 <&audma0 0x73>, <&audma0 0x74>;
1109 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1110 <&audma0 0x75>, <&audma0 0x76>;
1115 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1116 <&audma0 0x79>, <&audma0 0x7a>;
1121 dmas = <&audma0 0x11>, <&audma0 0x12>,
1122 <&audma0 0x7b>, <&audma0 0x7c>;
1127 dmas = <&audma0 0x13>, <&audma0 0x14>,
1128 <&audma0 0x7d>, <&audma0 0x7e>;
1137 reg = <0 0xec700000 0 0x10000>;
1169 reg = <0 0xee090000 0 0xc00>,
1170 <0 0xee080000 0 0x1100>;
1177 bus-range = <0 0>;
1181 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1182 interrupt-map-mask = <0xf800 0 0 0x7>;
1183 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1184 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1185 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1187 usb@1,0 {
1188 reg = <0x800 0 0 0 0>;
1189 phys = <&usb0 0>;
1193 usb@2,0 {
1194 reg = <0x1000 0 0 0 0>;
1195 phys = <&usb0 0>;
1204 reg = <0 0xee0d0000 0 0xc00>,
1205 <0 0xee0c0000 0 0x1100>;
1216 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1217 interrupt-map-mask = <0xf800 0 0 0x7>;
1218 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1219 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1220 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1222 usb@1,0 {
1223 reg = <0x10800 0 0 0 0>;
1224 phys = <&usb2 0>;
1228 usb@2,0 {
1229 reg = <0x11000 0 0 0 0>;
1230 phys = <&usb2 0>;
1238 reg = <0 0xee100000 0 0x328>;
1241 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1242 <&dmac1 0xcd>, <&dmac1 0xce>;
1253 reg = <0 0xee140000 0 0x100>;
1256 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1257 <&dmac1 0xc1>, <&dmac1 0xc2>;
1268 reg = <0 0xee160000 0 0x100>;
1271 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1272 <&dmac1 0xd3>, <&dmac1 0xd4>;
1283 reg = <0 0xee200000 0 0x80>;
1286 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1287 <&dmac1 0xd1>, <&dmac1 0xd2>;
1298 reg = <0 0xee700000 0 0x400>;
1305 #size-cells = <0>;
1312 #address-cells = <0>;
1314 reg = <0 0xf1001000 0 0x1000>,
1315 <0 0xf1002000 0 0x2000>,
1316 <0 0xf1004000 0 0x2000>,
1317 <0 0xf1006000 0 0x2000>;
1327 reg = <0 0xfe928000 0 0x8000>;
1336 reg = <0 0xfe930000 0 0x8000>;
1345 reg = <0 0xfe940000 0 0x2400>;
1354 reg = <0 0xfeb00000 0 0x40000>;
1358 clock-names = "du.0", "du.1";
1360 reset-names = "du.0";
1365 #size-cells = <0>;
1367 port@0 {
1368 reg = <0>;
1382 reg = <0 0xff000044 0 4>;
1388 reg = <0 0xffca0000 0 0x1004>;
1402 reg = <0 0xe6130000 0 0x1004>;
1431 #clock-cells = <0>;