Lines Matching +full:0 +full:xe61c0000
32 * The external audio clocks are configured as 0 Hz fixed frequency
38 #clock-cells = <0>;
39 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
55 #clock-cells = <0>;
57 clock-frequency = <0>;
62 #size-cells = <0>;
65 cpu0: cpu@0 {
68 reg = <0>;
105 L2_CA15: cache-controller-0 {
116 #clock-cells = <0>;
118 clock-frequency = <0>;
131 #clock-cells = <0>;
133 clock-frequency = <0>;
147 reg = <0 0xe6020000 0 0x0c>;
157 reg = <0 0xe6050000 0 0x50>;
161 gpio-ranges = <&pfc 0 0 32>;
172 reg = <0 0xe6051000 0 0x50>;
176 gpio-ranges = <&pfc 0 32 26>;
187 reg = <0 0xe6052000 0 0x50>;
191 gpio-ranges = <&pfc 0 64 32>;
202 reg = <0 0xe6053000 0 0x50>;
206 gpio-ranges = <&pfc 0 96 32>;
217 reg = <0 0xe6054000 0 0x50>;
221 gpio-ranges = <&pfc 0 128 32>;
232 reg = <0 0xe6055000 0 0x50>;
236 gpio-ranges = <&pfc 0 160 32>;
247 reg = <0 0xe6055400 0 0x50>;
251 gpio-ranges = <&pfc 0 192 32>;
262 reg = <0 0xe6055800 0 0x50>;
266 gpio-ranges = <&pfc 0 224 26>;
276 reg = <0 0xe6060000 0 0x250>;
282 reg = <0 0xe6150000 0 0x1000>;
286 #power-domain-cells = <0>;
292 reg = <0 0xe6152000 0 0x188>;
298 reg = <0 0xe6160000 0 0x0100>;
303 reg = <0 0xe6180000 0 0x0200>;
311 reg = <0 0xe61c0000 0 0x200>;
312 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
331 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
336 #thermal-sensor-cells = <0>;
342 reg = <0 0xe6280000 0 0x1000>;
352 reg = <0 0xe6290000 0 0x1000>;
361 reg = <0 0xe6740000 0 0x1000>;
371 reg = <0 0xec680000 0 0x1000>;
380 reg = <0 0xfe951000 0 0x1000>;
390 reg = <0 0xffc80000 0 0x1000>;
399 reg = <0 0xe62a0000 0 0x1000>;
408 reg = <0 0xe63a0000 0 0x12000>;
411 ranges = <0 0 0xe63a0000 0x12000>;
416 reg = <0 0xe63c0000 0 0x1000>;
419 ranges = <0 0 0xe63c0000 0x1000>;
421 smp-sram@0 {
423 reg = <0 0x100>;
432 #size-cells = <0>;
435 reg = <0 0xe6508000 0 0x40>;
446 #size-cells = <0>;
449 reg = <0 0xe6518000 0 0x40>;
460 #size-cells = <0>;
463 reg = <0 0xe6530000 0 0x40>;
474 #size-cells = <0>;
477 reg = <0 0xe6540000 0 0x40>;
488 #size-cells = <0>;
491 reg = <0 0xe6520000 0 0x40>;
503 #size-cells = <0>;
506 reg = <0 0xe6528000 0 0x40>;
518 #size-cells = <0>;
522 reg = <0 0xe60b0000 0 0x425>;
525 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
526 <&dmac1 0x77>, <&dmac1 0x78>;
535 #size-cells = <0>;
539 reg = <0 0xe6500000 0 0x425>;
542 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
543 <&dmac1 0x61>, <&dmac1 0x62>;
552 #size-cells = <0>;
556 reg = <0 0xe6510000 0 0x425>;
559 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
560 <&dmac1 0x65>, <&dmac1 0x66>;
570 reg = <0 0xe6700000 0 0x20000>;
603 reg = <0 0xe6720000 0 0x20000>;
635 reg = <0 0xe6b10000 0 0x2c>;
638 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
639 <&dmac1 0x17>, <&dmac1 0x18>;
645 #size-cells = <0>;
652 reg = <0 0xe6c40000 0 64>;
656 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
657 <&dmac1 0x21>, <&dmac1 0x22>;
667 reg = <0 0xe6c50000 0 64>;
671 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
672 <&dmac1 0x25>, <&dmac1 0x26>;
682 reg = <0 0xe6c60000 0 64>;
686 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
687 <&dmac1 0x27>, <&dmac1 0x28>;
697 reg = <0 0xe6c70000 0 64>;
701 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
702 <&dmac1 0x1b>, <&dmac1 0x1c>;
712 reg = <0 0xe6c78000 0 64>;
716 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
717 <&dmac1 0x1f>, <&dmac1 0x20>;
727 reg = <0 0xe6c80000 0 64>;
731 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
732 <&dmac1 0x23>, <&dmac1 0x24>;
742 reg = <0 0xe6c20000 0 0x100>;
746 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
747 <&dmac1 0x3d>, <&dmac1 0x3e>;
757 reg = <0 0xe6c30000 0 0x100>;
761 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
762 <&dmac1 0x19>, <&dmac1 0x1a>;
772 reg = <0 0xe6ce0000 0 0x100>;
776 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
777 <&dmac1 0x1d>, <&dmac1 0x1e>;
787 reg = <0 0xe6e60000 0 64>;
792 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
793 <&dmac1 0x29>, <&dmac1 0x2a>;
803 reg = <0 0xe6e68000 0 64>;
808 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
809 <&dmac1 0x2d>, <&dmac1 0x2e>;
819 reg = <0 0xe6e58000 0 64>;
824 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
825 <&dmac1 0x2b>, <&dmac1 0x2c>;
835 reg = <0 0xe6ea8000 0 64>;
840 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
841 <&dmac1 0x2f>, <&dmac1 0x30>;
851 reg = <0 0xe6ee0000 0 64>;
856 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
857 <&dmac1 0xfb>, <&dmac1 0xfc>;
867 reg = <0 0xe6ee8000 0 64>;
872 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
873 <&dmac1 0xfd>, <&dmac1 0xfe>;
883 reg = <0 0xe62c0000 0 96>;
888 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
889 <&dmac1 0x39>, <&dmac1 0x3a>;
899 reg = <0 0xe62c8000 0 96>;
904 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
905 <&dmac1 0x4d>, <&dmac1 0x4e>;
915 reg = <0 0xe62d0000 0 96>;
920 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
921 <&dmac1 0x3b>, <&dmac1 0x3c>;
931 reg = <0 0xe6e80000 0 0x1000>;
944 reg = <0 0xe6e88000 0 0x1000>;
957 reg = <0 0xe6ef0000 0 0x1000>;
968 reg = <0 0xe6ef1000 0 0x1000>;
979 reg = <0 0xe6ef2000 0 0x1000>;
991 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
996 reg = <0 0xec500000 0 0x1000>, /* SCU */
997 <0 0xec5a0000 0 0x100>, /* ADG */
998 <0 0xec540000 0 0x1000>, /* SSIU */
999 <0 0xec541000 0 0x280>, /* SSI */
1000 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1020 "ssi.1", "ssi.0",
1023 "src.1", "src.0",
1024 "dvc.0", "dvc.1",
1036 "ssi.1", "ssi.0";
1041 dvc0: dvc-0 {
1042 dmas = <&audma1 0xbc>;
1046 dmas = <&audma1 0xbe>;
1052 src0: src-0 {
1054 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1059 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1064 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1069 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1074 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1079 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1084 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1089 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1094 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1099 dmas = <&audma0 0x97>, <&audma1 0xba>;
1105 ssi0: ssi-0 {
1107 dmas = <&audma0 0x01>, <&audma1 0x02>,
1108 <&audma0 0x15>, <&audma1 0x16>;
1113 dmas = <&audma0 0x03>, <&audma1 0x04>,
1114 <&audma0 0x49>, <&audma1 0x4a>;
1119 dmas = <&audma0 0x05>, <&audma1 0x06>,
1120 <&audma0 0x63>, <&audma1 0x64>;
1125 dmas = <&audma0 0x07>, <&audma1 0x08>,
1126 <&audma0 0x6f>, <&audma1 0x70>;
1131 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1132 <&audma0 0x71>, <&audma1 0x72>;
1137 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1138 <&audma0 0x73>, <&audma1 0x74>;
1143 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1144 <&audma0 0x75>, <&audma1 0x76>;
1149 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1150 <&audma0 0x79>, <&audma1 0x7a>;
1155 dmas = <&audma0 0x11>, <&audma1 0x12>,
1156 <&audma0 0x7b>, <&audma1 0x7c>;
1161 dmas = <&audma0 0x13>, <&audma1 0x14>,
1162 <&audma0 0x7d>, <&audma1 0x7e>;
1171 reg = <0 0xec700000 0 0x10000>;
1202 reg = <0 0xec720000 0 0x10000>;
1233 reg = <0 0xee100000 0 0x328>;
1236 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1237 <&dmac1 0xcd>, <&dmac1 0xce>;
1248 reg = <0 0xee140000 0 0x100>;
1251 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1252 <&dmac1 0xc1>, <&dmac1 0xc2>;
1263 reg = <0 0xee160000 0 0x100>;
1266 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1267 <&dmac1 0xd3>, <&dmac1 0xd4>;
1278 reg = <0 0xee200000 0 0x80>;
1281 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1282 <&dmac1 0xd1>, <&dmac1 0xd2>;
1294 reg = <0 0xee700000 0 0x400>;
1301 #size-cells = <0>;
1308 #address-cells = <0>;
1310 reg = <0 0xf1001000 0 0x1000>,
1311 <0 0xf1002000 0 0x2000>,
1312 <0 0xf1004000 0 0x2000>,
1313 <0 0xf1006000 0 0x2000>;
1323 reg = <0 0xfe940000 0 0x2400>;
1332 reg = <0 0xfe944000 0 0x2400>;
1341 reg = <0 0xfeb00000 0 0x40000>;
1345 clock-names = "du.0", "du.1";
1347 reset-names = "du.0";
1352 #size-cells = <0>;
1354 port@0 {
1355 reg = <0>;
1370 reg = <0 0xfeb90000 0 0x1c>;
1379 #size-cells = <0>;
1381 port@0 {
1382 reg = <0>;
1397 reg = <0 0xff000044 0 4>;
1403 reg = <0 0xffca0000 0 0x1004>;
1417 reg = <0 0xe6130000 0 0x1004>;
1437 polling-delay-passive = <0>;
1438 polling-delay = <0>;
1445 hysteresis = <0>;
1465 #clock-cells = <0>;