Lines Matching +full:0 +full:xe61c0000

40 		#clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0>;
70 L2_CA15: cache-controller-0 {
81 #clock-cells = <0>;
83 clock-frequency = <0>;
96 #clock-cells = <0>;
98 clock-frequency = <0>;
112 reg = <0 0xe6020000 0 0x0c>;
122 reg = <0 0xe6050000 0 0x50>;
126 gpio-ranges = <&pfc 0 0 29>;
137 reg = <0 0xe6051000 0 0x50>;
141 gpio-ranges = <&pfc 0 32 23>;
152 reg = <0 0xe6052000 0 0x50>;
156 gpio-ranges = <&pfc 0 64 32>;
167 reg = <0 0xe6053000 0 0x50>;
171 gpio-ranges = <&pfc 0 96 28>;
182 reg = <0 0xe6054000 0 0x50>;
186 gpio-ranges = <&pfc 0 128 17>;
197 reg = <0 0xe6055000 0 0x50>;
201 gpio-ranges = <&pfc 0 160 17>;
212 reg = <0 0xe6055100 0 0x50>;
216 gpio-ranges = <&pfc 0 192 17>;
227 reg = <0 0xe6055200 0 0x50>;
231 gpio-ranges = <&pfc 0 224 17>;
242 reg = <0 0xe6055300 0 0x50>;
246 gpio-ranges = <&pfc 0 256 17>;
257 reg = <0 0xe6055400 0 0x50>;
261 gpio-ranges = <&pfc 0 288 17>;
272 reg = <0 0xe6055500 0 0x50>;
276 gpio-ranges = <&pfc 0 320 32>;
287 reg = <0 0xe6055600 0 0x50>;
291 gpio-ranges = <&pfc 0 352 30>;
301 reg = <0 0xe6060000 0 0x144>;
306 reg = <0 0xe6150000 0 0x1000>;
310 #power-domain-cells = <0>;
316 reg = <0 0xe6152000 0 0x188>;
322 reg = <0 0xe6160000 0 0x0100>;
327 reg = <0 0xe6180000 0 0x0200>;
335 reg = <0 0xe61c0000 0 0x200>;
336 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
347 reg = <0 0xe63a0000 0 0x12000>;
350 ranges = <0 0 0xe63a0000 0x12000>;
355 reg = <0 0xe63c0000 0 0x1000>;
358 ranges = <0 0 0xe63c0000 0x1000>;
360 smp-sram@0 {
362 reg = <0 0x100>;
370 reg = <0 0xe6508000 0 0x40>;
377 #size-cells = <0>;
384 reg = <0 0xe6518000 0 0x40>;
391 #size-cells = <0>;
398 reg = <0 0xe6530000 0 0x40>;
405 #size-cells = <0>;
412 reg = <0 0xe6540000 0 0x40>;
419 #size-cells = <0>;
426 reg = <0 0xe6520000 0 0x40>;
433 #size-cells = <0>;
440 reg = <0 0xe6528000 0 0x40>;
447 #size-cells = <0>;
453 #size-cells = <0>;
457 reg = <0 0xe60b0000 0 0x425>;
460 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
461 <&dmac1 0x77>, <&dmac1 0x78>;
471 reg = <0 0xe6700000 0 0x20000>;
504 reg = <0 0xe6720000 0 0x20000>;
537 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
543 #size-cells = <0>;
549 reg = <0 0xe6b10000 0 0x2c>;
552 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
553 <&dmac1 0x17>, <&dmac1 0x18>;
559 #size-cells = <0>;
566 reg = <0 0xe6e60000 0 64>;
571 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
572 <&dmac1 0x29>, <&dmac1 0x2a>;
582 reg = <0 0xe6e68000 0 64>;
587 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
588 <&dmac1 0x2d>, <&dmac1 0x2e>;
598 reg = <0 0xe6e58000 0 64>;
603 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
604 <&dmac1 0x2b>, <&dmac1 0x2c>;
614 reg = <0 0xe6ea8000 0 64>;
619 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
620 <&dmac1 0x2f>, <&dmac1 0x30>;
630 reg = <0 0xe62c0000 0 96>;
635 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
636 <&dmac1 0x39>, <&dmac1 0x3a>;
646 reg = <0 0xe62c8000 0 96>;
651 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
652 <&dmac1 0x4d>, <&dmac1 0x4e>;
662 reg = <0 0xe6e20000 0 0x0064>;
665 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
666 <&dmac1 0x51>, <&dmac1 0x52>;
671 #size-cells = <0>;
678 reg = <0 0xe6e10000 0 0x0064>;
681 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
682 <&dmac1 0x55>, <&dmac1 0x56>;
687 #size-cells = <0>;
694 reg = <0 0xe6e80000 0 0x1000>;
707 reg = <0 0xe6e88000 0 0x1000>;
720 reg = <0 0xe6ef0000 0 0x1000>;
731 reg = <0 0xe6ef1000 0 0x1000>;
742 reg = <0 0xe6ef2000 0 0x1000>;
753 reg = <0 0xe6ef3000 0 0x1000>;
764 reg = <0 0xe6ef4000 0 0x1000>;
775 reg = <0 0xe6ef5000 0 0x1000>;
786 reg = <0 0xee100000 0 0x328>;
787 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
788 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
789 <&dmac1 0xcd>, <&dmac1 0xce>;
801 reg = <0 0xf1001000 0 0x1000>,
802 <0 0xf1002000 0 0x2000>,
803 <0 0xf1004000 0 0x2000>,
804 <0 0xf1006000 0 0x2000>;
815 reg = <0 0xfe928000 0 0x8000>;
824 reg = <0 0xfe930000 0 0x8000>;
833 reg = <0 0xfe938000 0 0x8000>;
843 reg = <0 0xfe980000 0 0x10300>;
852 reg = <0 0xfeb00000 0 0x40000>;
856 clock-names = "du.0", "du.1";
858 reset-names = "du.0";
863 #size-cells = <0>;
865 port@0 {
866 reg = <0>;
880 reg = <0 0xff000044 0 4>;
886 reg = <0 0xffca0000 0 0x1004>;
900 reg = <0 0xe6130000 0 0x1004>;