Lines Matching +full:ether +full:- +full:link +full:- +full:active +full:- +full:low

1 // SPDX-License-Identifier: GPL-2.0
3  * Device Tree Source for the SK-RZG1E board
5  * Copyright (C) 2016-2017 Cogent Embedded, Inc.
8 /dts-v1/;
12 	model = "SK-RZG1E";
13 	compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
21 		stdout-path = "serial0:115200n8";
31 	clock-frequency = <20000000>;
40 	ether_pins: ether {
52 	pinctrl-0 = <&scif2_pins>;
53 	pinctrl-names = "default";
58 &ether {
59 	pinctrl-0 = <&ether_pins &phy1_pins>;
60 	pinctrl-names = "default";
62 	phy-handle = <&phy1>;
63 	renesas,ether-link-active-low;
66 	phy1: ethernet-phy@1 {
68 		interrupt-parent = <&irqc>;
70 		micrel,led-mode = <1>;