Lines Matching +full:ether +full:- +full:link +full:- +full:active +full:- +full:low
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SK-RZG1M board
5 * Copyright (C) 2016-2017 Cogent Embedded, Inc.
8 /dts-v1/;
12 model = "SK-RZG1M";
13 compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
21 stdout-path = "serial0:115200n8";
36 clock-frequency = <20000000>;
45 ether_pins: ether {
57 pinctrl-0 = <&scif0_pins>;
58 pinctrl-names = "default";
63 ðer {
64 pinctrl-0 = <ðer_pins &phy1_pins>;
65 pinctrl-names = "default";
67 phy-handle = <&phy1>;
68 renesas,ether-link-active-low;
71 phy1: ethernet-phy@1 {
73 interrupt-parent = <&irqc>;
75 micrel,led-mode = <1>;