Lines Matching +full:0 +full:xfcfef800
20 #clock-cells = <0>;
23 clock-frequency = <0>;
27 #clock-cells = <0>;
30 clock-frequency = <0>;
34 #clock-cells = <0>;
37 clock-frequency = <0>;
42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0>;
63 reg = <0x1f003000 0x1000>;
73 reg = <0xe8007000 0x18>;
90 reg = <0xe8007800 0x18>;
107 reg = <0xe8008000 0x18>;
124 reg = <0xe8008800 0x18>;
141 reg = <0xe8009000 0x18>;
158 reg = <0xe800c800 0x24>;
167 #size-cells = <0>;
173 reg = <0xe800d000 0x24>;
182 #size-cells = <0>;
188 reg = <0xe800d800 0x24>;
197 #size-cells = <0>;
203 reg = <0xe8204000 0x200>;
210 #size-cells = <0>;
216 reg = <0xe8204200 0x200>;
222 #size-cells = <0>;
228 #size-cells = <0>;
230 reg = <0xe803a000 0x44>;
247 #size-cells = <0>;
249 reg = <0xe803a400 0x44>;
266 #size-cells = <0>;
268 reg = <0xe803a800 0x44>;
285 #size-cells = <0>;
287 reg = <0xe803ac00 0x44>;
304 reg = <0xe803b000 0x30>;
313 reg = <0xe803c000 0x30>;
322 reg = <0xe803d000 0x30>;
331 reg = <0xe8218000 0x100>;
342 reg = <0xe8218100 0x100>;
353 reg = <0xe8218200 0x700>;
358 #phy-cells = <0>;
364 reg = <0xe8219000 0x724>;
376 reg = <0xe821a000 0x100>;
387 reg = <0xe821a100 0x100>;
398 reg = <0xe821a200 0x700>;
403 #phy-cells = <0>;
409 reg = <0xe821b000 0x724>;
421 reg = <0xe8228000 0x8c0>;
433 reg = <0xe822a000 0x8c0>;
446 #address-cells = <0>;
448 reg = <0xe8221000 0x1000>,
449 <0xe8222000 0x1000>;
454 reg = <0xfcfe0010 0x455>;
458 #power-domain-cells = <0>;
463 reg = <0xfcfe7000 0x26>;
470 reg = <0xfcfe8004 4>;
477 #address-cells = <0>;
479 reg = <0xfcfef800 0x6>;
481 <0 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
482 <1 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
483 <2 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
484 <3 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
485 <4 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
486 <5 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
487 <6 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
488 <7 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
489 interrupt-map-mask = <7 0>;
494 reg = <0xfcffe000 0x1000>;
498 gpio-ranges = <&pinctrl 0 0 176>;