Lines Matching +full:kpss +full:- +full:acc +full:- +full:v2
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 interrupt-parent = <&intc>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
26 no-map;
31 no-map;
36 no-map;
41 no-map;
46 no-map;
51 no-map;
56 no-map;
61 no-map;
65 compatible = "qcom,rmtfs-mem";
67 no-map;
69 qcom,client-id = <1>;
74 #address-cells = <1>;
75 #size-cells = <0>;
80 enable-method = "qcom,kpss-acc-v2";
83 next-level-cache = <&L2>;
84 qcom,acc = <&acc0>;
86 cpu-idle-states = <&CPU_SPC>;
91 enable-method = "qcom,kpss-acc-v2";
94 next-level-cache = <&L2>;
95 qcom,acc = <&acc1>;
97 cpu-idle-states = <&CPU_SPC>;
102 enable-method = "qcom,kpss-acc-v2";
105 next-level-cache = <&L2>;
106 qcom,acc = <&acc2>;
108 cpu-idle-states = <&CPU_SPC>;
113 enable-method = "qcom,kpss-acc-v2";
116 next-level-cache = <&L2>;
117 qcom,acc = <&acc3>;
119 cpu-idle-states = <&CPU_SPC>;
122 L2: l2-cache {
124 cache-level = <2>;
128 idle-states {
130 compatible = "qcom,idle-state-spc",
131 "arm,idle-state";
132 entry-latency-us = <150>;
133 exit-latency-us = <200>;
134 min-residency-us = <2000>;
144 thermal-zones {
145 cpu-thermal0 {
146 polling-delay-passive = <250>;
147 polling-delay = <1000>;
149 thermal-sensors = <&tsens 5>;
165 cpu-thermal1 {
166 polling-delay-passive = <250>;
167 polling-delay = <1000>;
169 thermal-sensors = <&tsens 6>;
185 cpu-thermal2 {
186 polling-delay-passive = <250>;
187 polling-delay = <1000>;
189 thermal-sensors = <&tsens 7>;
205 cpu-thermal3 {
206 polling-delay-passive = <250>;
207 polling-delay = <1000>;
209 thermal-sensors = <&tsens 8>;
225 q6-dsp-thermal {
226 polling-delay-passive = <250>;
227 polling-delay = <1000>;
229 thermal-sensors = <&tsens 1>;
232 q6_dsp_alert0: trip-point0 {
240 modemtx-thermal {
241 polling-delay-passive = <250>;
242 polling-delay = <1000>;
244 thermal-sensors = <&tsens 2>;
247 modemtx_alert0: trip-point0 {
255 video-thermal {
256 polling-delay-passive = <250>;
257 polling-delay = <1000>;
259 thermal-sensors = <&tsens 3>;
262 video_alert0: trip-point0 {
270 wlan-thermal {
271 polling-delay-passive = <250>;
272 polling-delay = <1000>;
274 thermal-sensors = <&tsens 4>;
277 wlan_alert0: trip-point0 {
285 gpu-thermal-top {
286 polling-delay-passive = <250>;
287 polling-delay = <1000>;
289 thermal-sensors = <&tsens 9>;
292 gpu1_alert0: trip-point0 {
300 gpu-thermal-bottom {
301 polling-delay-passive = <250>;
302 polling-delay = <1000>;
304 thermal-sensors = <&tsens 10>;
307 gpu2_alert0: trip-point0 {
316 cpu-pmu {
317 compatible = "qcom,krait-pmu";
323 compatible = "fixed-clock";
324 #clock-cells = <0>;
325 clock-frequency = <19200000>;
329 compatible = "fixed-clock";
330 #clock-cells = <0>;
331 clock-frequency = <32768>;
336 compatible = "arm,armv7-timer";
341 clock-frequency = <19200000>;
344 adsp-pil {
345 compatible = "qcom,msm8974-adsp-pil";
347 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
352 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
354 cx-supply = <&pm8841_s2>;
357 clock-names = "xo";
359 memory-region = <&adsp_region>;
361 qcom,smem-states = <&adsp_smp2p_out 0>;
362 qcom,smem-state-names = "stop";
364 smd-edge {
368 qcom,smd-edge = <1>;
377 memory-region = <&smem_region>;
378 qcom,rpm-msg-ram = <&rpm_msg_ram>;
383 smp2p-adsp {
387 interrupt-parent = <&intc>;
392 qcom,local-pid = <0>;
393 qcom,remote-pid = <2>;
395 adsp_smp2p_out: master-kernel {
396 qcom,entry-name = "master-kernel";
397 #qcom,smem-state-cells = <1>;
400 adsp_smp2p_in: slave-kernel {
401 qcom,entry-name = "slave-kernel";
403 interrupt-controller;
404 #interrupt-cells = <2>;
408 smp2p-modem {
412 interrupt-parent = <&intc>;
417 qcom,local-pid = <0>;
418 qcom,remote-pid = <1>;
420 modem_smp2p_out: master-kernel {
421 qcom,entry-name = "master-kernel";
422 #qcom,smem-state-cells = <1>;
425 modem_smp2p_in: slave-kernel {
426 qcom,entry-name = "slave-kernel";
428 interrupt-controller;
429 #interrupt-cells = <2>;
433 smp2p-wcnss {
437 interrupt-parent = <&intc>;
442 qcom,local-pid = <0>;
443 qcom,remote-pid = <4>;
445 wcnss_smp2p_out: master-kernel {
446 qcom,entry-name = "master-kernel";
448 #qcom,smem-state-cells = <1>;
451 wcnss_smp2p_in: slave-kernel {
452 qcom,entry-name = "slave-kernel";
454 interrupt-controller;
455 #interrupt-cells = <2>;
462 #address-cells = <1>;
463 #size-cells = <0>;
465 qcom,ipc-1 = <&apcs 8 13>;
466 qcom,ipc-2 = <&apcs 8 9>;
467 qcom,ipc-3 = <&apcs 8 19>;
472 #qcom,smem-state-cells = <1>;
479 interrupt-controller;
480 #interrupt-cells = <2>;
487 interrupt-controller;
488 #interrupt-cells = <2>;
495 interrupt-controller;
496 #interrupt-cells = <2>;
504 clock-names = "core", "bus", "iface";
509 #address-cells = <1>;
510 #size-cells = <1>;
512 compatible = "simple-bus";
514 intc: interrupt-controller@f9000000 {
515 compatible = "qcom,msm-qgic2";
516 interrupt-controller;
517 #interrupt-cells = <3>;
528 #address-cells = <1>;
529 #size-cells = <1>;
540 tsens: thermal-sensor@fc4a9000 {
541 compatible = "qcom,msm8974-tsens";
544 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
545 nvmem-cell-names = "calib", "calib_backup";
548 interrupt-names = "uplow";
549 #thermal-sensor-cells = <1>;
553 #address-cells = <1>;
554 #size-cells = <1>;
556 compatible = "arm,armv7-timer-mem";
558 clock-frequency = <19200000>;
561 frame-number = <0>;
569 frame-number = <1>;
576 frame-number = <2>;
583 frame-number = <3>;
590 frame-number = <4>;
597 frame-number = <5>;
604 frame-number = <6>;
611 saw0: power-controller@f9089000 {
612 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
616 saw1: power-controller@f9099000 {
617 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
621 saw2: power-controller@f90a9000 {
622 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
626 saw3: power-controller@f90b9000 {
627 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
631 saw_l2: power-controller@f9012000 {
637 acc0: clock-controller@f9088000 {
638 compatible = "qcom,kpss-acc-v2";
642 acc1: clock-controller@f9098000 {
643 compatible = "qcom,kpss-acc-v2";
647 acc2: clock-controller@f90a8000 {
648 compatible = "qcom,kpss-acc-v2";
652 acc3: clock-controller@f90b8000 {
653 compatible = "qcom,kpss-acc-v2";
662 gcc: clock-controller@fc400000 {
663 compatible = "qcom,gcc-msm8974";
664 #clock-cells = <1>;
665 #reset-cells = <1>;
666 #power-domain-cells = <1>;
680 mmcc: clock-controller@fd8c0000 {
681 compatible = "qcom,mmcc-msm8974";
682 #clock-cells = <1>;
683 #reset-cells = <1>;
684 #power-domain-cells = <1>;
688 tcsr_mutex: tcsr-mutex {
689 compatible = "qcom,tcsr-mutex";
692 #hwlock-cells = <1>;
696 compatible = "qcom,rpm-msg-ram";
701 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
705 clock-names = "core", "iface";
710 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
714 clock-names = "core", "iface";
719 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
723 clock-names = "core", "iface";
728 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
730 reg-names = "hc_mem", "core_mem";
733 interrupt-names = "hc_irq", "pwr_irq";
737 clock-names = "core", "iface", "xo";
742 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
744 reg-names = "hc_mem", "core_mem";
747 interrupt-names = "hc_irq", "pwr_irq";
751 clock-names = "core", "iface", "xo";
756 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
758 reg-names = "hc_mem", "core_mem";
761 interrupt-names = "hc_irq", "pwr_irq";
765 clock-names = "core", "iface", "xo";
770 compatible = "qcom,ci-hdrc";
776 clock-names = "iface", "core";
777 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
778 assigned-clock-rates = <75000000>;
780 reset-names = "core";
783 ahb-burst-config = <0>;
784 phy-names = "usb-phy";
786 #reset-cells = <1>;
790 compatible = "qcom,usb-hs-phy-msm8974",
791 "qcom,usb-hs-phy";
792 #phy-cells = <0>;
794 clock-names = "ref", "sleep";
796 reset-names = "phy", "por";
801 compatible = "qcom,usb-hs-phy-msm8974",
802 "qcom,usb-hs-phy";
803 #phy-cells = <0>;
805 clock-names = "ref", "sleep";
807 reset-names = "phy", "por";
817 clock-names = "core";
821 compatible = "qcom,msm8974-mss-pil";
823 reg-names = "qdsp6", "rmb";
825 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
830 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
836 clock-names = "iface", "bus", "mem", "xo";
839 reset-names = "mss_restart";
841 cx-supply = <&pm8841_s2>;
842 mss-supply = <&pm8841_s3>;
843 mx-supply = <&pm8841_s1>;
844 pll-supply = <&pm8941_l12>;
846 qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
848 qcom,smem-states = <&modem_smp2p_out 0>;
849 qcom,smem-state-names = "stop";
852 memory-region = <&mba_region>;
856 memory-region = <&mpss_region>;
859 smd-edge {
863 qcom,smd-edge = <0>;
870 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
872 reg-names = "ccu", "dxe", "pmu";
874 memory-region = <&wcnss_region>;
876 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
881 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
883 vddpx-supply = <&pm8941_s3>;
885 qcom,smem-states = <&wcnss_smp2p_out 0>;
886 qcom,smem-state-names = "stop";
894 clock-names = "xo";
896 vddxo-supply = <&pm8941_l6>;
897 vddrfa-supply = <&pm8941_l11>;
898 vddpa-supply = <&pm8941_l19>;
899 vdddig-supply = <&pm8941_s3>;
902 smd-edge {
906 qcom,smd-edge = <6>;
910 qcom,smd-channels = "WCNSS_CTRL";
916 compatible = "qcom,wcnss-bt";
920 compatible = "qcom,wcnss-wlan";
924 interrupt-names = "tx", "rx";
926 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
927 qcom,smem-state-names = "tx-enable", "tx-rings-empty";
934 compatible = "qcom,msm8974-pinctrl";
936 gpio-controller;
937 gpio-ranges = <&msmgpio 0 0 146>;
938 #gpio-cells = <2>;
939 interrupt-controller;
940 #interrupt-cells = <2>;
946 compatible = "qcom,i2c-qup-v2.1.1";
950 clock-names = "core", "iface";
951 #address-cells = <1>;
952 #size-cells = <0>;
957 compatible = "qcom,i2c-qup-v2.1.1";
961 clock-names = "core", "iface";
962 #address-cells = <1>;
963 #size-cells = <0>;
968 compatible = "qcom,i2c-qup-v2.1.1";
972 clock-names = "core", "iface";
973 #address-cells = <1>;
974 #size-cells = <0>;
979 compatible = "qcom,i2c-qup-v2.1.1";
983 clock-names = "core", "iface";
984 #address-cells = <1>;
985 #size-cells = <0>;
990 compatible = "qcom,i2c-qup-v2.1.1";
994 clock-names = "core", "iface";
995 #address-cells = <1>;
996 #size-cells = <0>;
1001 compatible = "qcom,i2c-qup-v2.1.1";
1005 clock-names = "core", "iface";
1006 #address-cells = <1>;
1007 #size-cells = <0>;
1009 dma-names = "tx", "rx";
1014 compatible = "qcom,i2c-qup-v2.1.1";
1018 clock-names = "core", "iface";
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1024 compatible = "qcom,spmi-pmic-arb";
1025 reg-names = "core", "intr", "cnfg";
1029 interrupt-names = "periph_irq";
1033 #address-cells = <2>;
1034 #size-cells = <0>;
1035 interrupt-controller;
1036 #interrupt-cells = <4>;
1039 blsp2_dma: dma-controller@f9944000 {
1040 compatible = "qcom,bam-v1.4.0";
1044 clock-names = "bam_clk";
1045 #dma-cells = <1>;
1050 compatible = "arm,coresight-tmc", "arm,primecell";
1054 clock-names = "apb_pclk", "atclk";
1056 in-ports {
1059 remote-endpoint = <&replicator_out0>;
1066 compatible = "arm,coresight-tpiu", "arm,primecell";
1070 clock-names = "apb_pclk", "atclk";
1072 in-ports {
1075 remote-endpoint = <&replicator_out1>;
1082 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
1086 clock-names = "apb_pclk", "atclk";
1088 out-ports {
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1095 remote-endpoint = <&etr_in>;
1101 remote-endpoint = <&tpiu_in>;
1106 in-ports {
1109 remote-endpoint = <&etf_out>;
1116 compatible = "arm,coresight-tmc", "arm,primecell";
1120 clock-names = "apb_pclk", "atclk";
1122 out-ports {
1125 remote-endpoint = <&replicator_in>;
1130 in-ports {
1133 remote-endpoint = <&merger_out>;
1140 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1144 clock-names = "apb_pclk", "atclk";
1146 in-ports {
1147 #address-cells = <1>;
1148 #size-cells = <0>;
1152 * 0 - connected trought funnel to Audio, Modem and
1154 * 2...7 - not-connected
1159 remote-endpoint = <&funnel1_out>;
1164 out-ports {
1167 remote-endpoint = <&etf_in>;
1174 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1178 clock-names = "apb_pclk", "atclk";
1180 in-ports {
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1186 * 0 - not-connected
1187 * 1 - connected trought funnel to Multimedia CPU
1188 * 2 - connected to Wireless CPU
1189 * 3 - not-connected
1190 * 4 - not-connected
1191 * 6 - not-connected
1192 * 7 - connected to STM
1197 remote-endpoint = <&kpss_out>;
1202 out-ports {
1205 remote-endpoint = <&merger_in1>;
1211 funnel@fc345000 { /* KPSS funnel only 4 inputs are used */
1212 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1216 clock-names = "apb_pclk", "atclk";
1218 in-ports {
1219 #address-cells = <1>;
1220 #size-cells = <0>;
1225 remote-endpoint = <&etm0_out>;
1231 remote-endpoint = <&etm1_out>;
1237 remote-endpoint = <&etm2_out>;
1243 remote-endpoint = <&etm3_out>;
1248 out-ports {
1251 remote-endpoint = <&funnel1_in5>;
1258 compatible = "arm,coresight-etm4x", "arm,primecell";
1262 clock-names = "apb_pclk", "atclk";
1266 out-ports {
1269 remote-endpoint = <&kpss_in0>;
1276 compatible = "arm,coresight-etm4x", "arm,primecell";
1280 clock-names = "apb_pclk", "atclk";
1284 out-ports {
1287 remote-endpoint = <&kpss_in1>;
1294 compatible = "arm,coresight-etm4x", "arm,primecell";
1298 clock-names = "apb_pclk", "atclk";
1302 out-ports {
1305 remote-endpoint = <&kpss_in2>;
1312 compatible = "arm,coresight-etm4x", "arm,primecell";
1316 clock-names = "apb_pclk", "atclk";
1320 out-ports {
1323 remote-endpoint = <&kpss_in3>;
1330 compatible = "qcom,msm8974-ocmem";
1333 reg-names = "ctrl",
1337 clock-names = "core",
1340 #address-cells = <1>;
1341 #size-cells = <1>;
1343 gmu_sram: gmu-sram@0 {
1350 compatible = "qcom,msm8974-bimc";
1351 #interconnect-cells = <1>;
1352 clock-names = "bus", "bus_a";
1359 compatible = "qcom,msm8974-snoc";
1360 #interconnect-cells = <1>;
1361 clock-names = "bus", "bus_a";
1368 compatible = "qcom,msm8974-pnoc";
1369 #interconnect-cells = <1>;
1370 clock-names = "bus", "bus_a";
1377 compatible = "qcom,msm8974-ocmemnoc";
1378 #interconnect-cells = <1>;
1379 clock-names = "bus", "bus_a";
1386 compatible = "qcom,msm8974-mmssnoc";
1387 #interconnect-cells = <1>;
1388 clock-names = "bus", "bus_a";
1395 compatible = "qcom,msm8974-cnoc";
1396 #interconnect-cells = <1>;
1397 clock-names = "bus", "bus_a";
1408 reg-names = "mdss_phys",
1411 power-domains = <&mmcc MDSS_GDSC>;
1416 clock-names = "iface",
1422 interrupt-controller;
1423 #interrupt-cells = <1>;
1425 #address-cells = <1>;
1426 #size-cells = <1>;
1434 reg-names = "mdp_phys";
1436 interrupt-parent = <&mdss>;
1443 clock-names = "iface",
1449 interconnect-names = "mdp0-mem";
1452 #address-cells = <1>;
1453 #size-cells = <0>;
1458 remote-endpoint = <&dsi0_in>;
1467 compatible = "qcom,mdss-dsi-ctrl";
1469 reg-names = "dsi_ctrl";
1471 interrupt-parent = <&mdss>;
1474 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
1476 assigned-clock-parents = <&dsi_phy0 0>,
1486 clock-names = "mdp_core",
1495 phy-names = "dsi-phy";
1498 #address-cells = <1>;
1499 #size-cells = <0>;
1504 remote-endpoint = <&mdp5_intf1_out>;
1516 dsi_phy0: dsi-phy@fd922a00 {
1519 compatible = "qcom,dsi-phy-28nm-hpm";
1523 reg-names = "dsi_pll",
1527 #clock-cells = <1>;
1528 #phy-cells = <0>;
1529 qcom,dsi-phy-index = <0>;
1532 clock-names = "iface";
1538 compatible = "syscon", "simple-mfd";
1541 reboot-mode {
1542 compatible = "syscon-reboot-mode";
1554 qcom,smd-edge = <15>;
1557 compatible = "qcom,rpm-msm8974";
1558 qcom,smd-channels = "rpm_requests";
1560 rpmcc: clock-controller {
1561 compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
1562 #clock-cells = <1>;
1565 pm8841-regulators {
1566 compatible = "qcom,rpm-pm8841-regulators";
1578 pm8941-regulators {
1579 compatible = "qcom,rpm-pm8941-regulators";
1618 vreg_boost: vreg-boost {
1619 compatible = "regulator-fixed";
1621 regulator-name = "vreg-boost";
1622 regulator-min-microvolt = <3150000>;
1623 regulator-max-microvolt = <3150000>;
1625 regulator-always-on;
1626 regulator-boot-on;
1629 enable-active-high;
1631 pinctrl-names = "default";
1632 pinctrl-0 = <&boost_bypass_n_pin>;
1634 vreg_vph_pwr: vreg-vph-pwr {
1635 compatible = "regulator-fixed";
1636 regulator-name = "vph-pwr";
1638 regulator-min-microvolt = <3600000>;
1639 regulator-max-microvolt = <3600000>;
1641 regulator-always-on;