Lines Matching +full:0 +full:xfdd00000
25 reg = <0x08000000 0x5100000>;
30 reg = <0x0d100000 0x100000>;
35 reg = <0x0d200000 0xa00000>;
40 reg = <0x0dc00000 0x1900000>;
45 reg = <0x0f500000 0x500000>;
50 reg = <0xfa00000 0x200000>;
55 reg = <0x0fc00000 0x160000>;
60 reg = <0x0fd60000 0x20000>;
66 reg = <0x0fd80000 0x180000>;
75 #size-cells = <0>;
76 interrupts = <GIC_PPI 9 0xf04>;
78 CPU0: cpu@0 {
82 reg = <0>;
141 reg = <0x0 0x0>;
318 interrupts = <GIC_PPI 7 0xf04>;
324 #clock-cells = <0>;
330 #clock-cells = <0>;
337 interrupts = <GIC_PPI 2 0xf08>,
338 <GIC_PPI 3 0xf08>,
339 <GIC_PPI 4 0xf08>,
340 <GIC_PPI 1 0xf08>;
348 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
361 qcom,smem-states = <&adsp_smp2p_out 0>;
392 qcom,local-pid = <0>;
417 qcom,local-pid = <0>;
442 qcom,local-pid = <0>;
463 #size-cells = <0>;
469 apps_smsm: apps@0 {
470 reg = <0>;
518 reg = <0xf9000000 0x1000>,
519 <0xf9002000 0x1000>;
524 reg = <0xf9011000 0x1000>;
531 reg = <0xfc4bc000 0x1000>;
533 reg = <0xd0 0x18>;
536 reg = <0x440 0x10>;
542 reg = <0xfc4a9000 0x1000>, /* TM */
543 <0xfc4a8000 0x1000>; /* SROT */
557 reg = <0xf9020000 0x1000>;
561 frame-number = <0>;
564 reg = <0xf9021000 0x1000>,
565 <0xf9022000 0x1000>;
571 reg = <0xf9023000 0x1000>;
578 reg = <0xf9024000 0x1000>;
585 reg = <0xf9025000 0x1000>;
592 reg = <0xf9026000 0x1000>;
599 reg = <0xf9027000 0x1000>;
606 reg = <0xf9028000 0x1000>;
613 reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
618 reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
623 reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
628 reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
633 reg = <0xf9012000 0x1000>;
639 reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
644 reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
649 reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
654 reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
659 reg = <0xfc4ab000 0x4>;
667 reg = <0xfc400000 0x4000>;
672 reg = <0xfd4a0000 0x10000>;
677 reg = <0xfd484000 0x2000>;
685 reg = <0xfd8c0000 0x6000>;
690 syscon = <&tcsr_mutex_block 0 0x80>;
697 reg = <0xfc428000 0x4000>;
702 reg = <0xf991d000 0x1000>;
711 reg = <0xf991e000 0x1000>;
720 reg = <0xf9960000 0x1000>;
729 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
743 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
757 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
771 reg = <0xf9a55000 0x200>,
772 <0xf9a55200 0x200>;
783 ahb-burst-config = <0>;
792 #phy-cells = <0>;
795 resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
803 #phy-cells = <0>;
815 reg = <0xf9bff000 0x200>;
822 reg = <0xfc880000 0x100>, <0xfc820000 0x020>;
826 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
846 qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
848 qcom,smem-states = <&modem_smp2p_out 0>;
863 qcom,smd-edge = <0>;
871 reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>;
877 <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
885 qcom,smem-states = <&wcnss_smp2p_out 0>;
935 reg = <0xfd510000 0x4000>;
937 gpio-ranges = <&msmgpio 0 0 146>;
947 reg = <0xf9923000 0x1000>;
948 interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
952 #size-cells = <0>;
958 reg = <0xf9924000 0x1000>;
963 #size-cells = <0>;
969 reg = <0xf9925000 0x1000>;
970 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
974 #size-cells = <0>;
980 reg = <0xf9928000 0x1000>;
985 #size-cells = <0>;
991 reg = <0xf9964000 0x1000>;
996 #size-cells = <0>;
1002 reg = <0xf9967000 0x1000>;
1007 #size-cells = <0>;
1015 reg = <0xf9968000 0x1000>;
1016 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
1020 #size-cells = <0>;
1026 reg = <0xfc4cf000 0x1000>,
1027 <0xfc4cb000 0x1000>,
1028 <0xfc4ca000 0x1000>;
1031 qcom,ee = <0>;
1032 qcom,channel = <0>;
1034 #size-cells = <0>;
1041 reg = <0xf9944000 0x19000>;
1046 qcom,ee = <0>;
1051 reg = <0xfc322000 0x1000>;
1067 reg = <0xfc318000 0x1000>;
1083 reg = <0xfc31c000 0x1000>;
1090 #size-cells = <0>;
1092 port@0 {
1093 reg = <0>;
1117 reg = <0xfc307000 0x1000>;
1141 reg = <0xfc31b000 0x1000>;
1148 #size-cells = <0>;
1152 * 0 - connected trought funnel to Audio, Modem and
1175 reg = <0xfc31a000 0x1000>;
1182 #size-cells = <0>;
1186 * 0 - not-connected
1213 reg = <0xfc345000 0x1000>;
1220 #size-cells = <0>;
1222 port@0 {
1223 reg = <0>;
1259 reg = <0xfc33c000 0x1000>;
1277 reg = <0xfc33d000 0x1000>;
1295 reg = <0xfc33e000 0x1000>;
1313 reg = <0xfc33f000 0x1000>;
1331 reg = <0xfdd00000 0x2000>,
1332 <0xfec00000 0x180000>;
1343 gmu_sram: gmu-sram@0 {
1344 reg = <0x0 0x100000>;
1349 reg = <0xfc380000 0x6a000>;
1358 reg = <0xfc460000 0x4000>;
1367 reg = <0xfc468000 0x4000>;
1376 reg = <0xfc470000 0x4000>;
1385 reg = <0xfc478000 0x4000>;
1394 reg = <0xfc480000 0x4000>;
1406 reg = <0xfd900000 0x100>,
1407 <0xfd924000 0x1000>;
1433 reg = <0xfd900100 0x22000>;
1437 interrupts = <0 0>;
1453 #size-cells = <0>;
1455 port@0 {
1456 reg = <0>;
1468 reg = <0xfd922800 0x1f8>;
1476 assigned-clock-parents = <&dsi_phy0 0>,
1499 #size-cells = <0>;
1501 port@0 {
1502 reg = <0>;
1520 reg = <0xfd922a00 0xd4>,
1521 <0xfd922b00 0x280>,
1522 <0xfd922d80 0x30>;
1528 #phy-cells = <0>;
1529 qcom,dsi-phy-index = <0>;
1539 reg = <0xfe805000 0x1000>;
1543 offset = <0x65c>;
1553 qcom,ipc = <&apcs 8 0>;
1632 pinctrl-0 = <&boost_bypass_n_pin>;