Lines Matching refs:gcc
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
54 clocks = <&gcc GCC_APPS_CLK_SRC>;
68 clocks = <&gcc GCC_APPS_CLK_SRC>;
82 clocks = <&gcc GCC_APPS_CLK_SRC>;
96 clocks = <&gcc GCC_APPS_CLK_SRC>;
186 gcc: clock-controller@1800000 { label
187 compatible = "qcom,gcc-ipq4019";
196 clocks = <&gcc GCC_PRNG_AHB_CLK>;
218 clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
219 <&gcc GCC_DCD_XO_CLK>;
228 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
239 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
240 <&gcc GCC_BLSP1_AHB_CLK>;
253 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
254 <&gcc GCC_BLSP1_AHB_CLK>;
267 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
268 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
281 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
282 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
295 clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
306 clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
307 <&gcc GCC_CRYPTO_AXI_CLK>,
308 <&gcc GCC_CRYPTO_CLK>;
370 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
371 <&gcc GCC_BLSP1_AHB_CLK>;
382 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
383 <&gcc GCC_BLSP1_AHB_CLK>;
427 clocks = <&gcc GCC_PCIE_AHB_CLK>,
428 <&gcc GCC_PCIE_AXI_M_CLK>,
429 <&gcc GCC_PCIE_AXI_S_CLK>;
434 resets = <&gcc PCIE_AXI_M_ARES>,
435 <&gcc PCIE_AXI_S_ARES>,
436 <&gcc PCIE_PIPE_ARES>,
437 <&gcc PCIE_AXI_M_VMIDMT_ARES>,
438 <&gcc PCIE_AXI_S_XPU_ARES>,
439 <&gcc PCIE_PARF_XPU_ARES>,
440 <&gcc PCIE_PHY_ARES>,
441 <&gcc PCIE_AXI_M_STICKY_ARES>,
442 <&gcc PCIE_PIPE_STICKY_ARES>,
443 <&gcc PCIE_PWR_ARES>,
444 <&gcc PCIE_AHB_ARES>,
445 <&gcc PCIE_PHY_AHB_ARES>;
466 clocks = <&gcc GCC_QPIC_CLK>;
478 clocks = <&gcc GCC_QPIC_CLK>,
479 <&gcc GCC_QPIC_AHB_CLK>;
500 resets = <&gcc WIFI0_CPU_INIT_RESET>,
501 <&gcc WIFI0_RADIO_SRIF_RESET>,
502 <&gcc WIFI0_RADIO_WARM_RESET>,
503 <&gcc WIFI0_RADIO_COLD_RESET>,
504 <&gcc WIFI0_CORE_WARM_RESET>,
505 <&gcc WIFI0_CORE_COLD_RESET>;
509 clocks = <&gcc GCC_WCSS2G_CLK>,
510 <&gcc GCC_WCSS2G_REF_CLK>,
511 <&gcc GCC_WCSS2G_RTC_CLK>;
542 resets = <&gcc WIFI1_CPU_INIT_RESET>,
543 <&gcc WIFI1_RADIO_SRIF_RESET>,
544 <&gcc WIFI1_RADIO_WARM_RESET>,
545 <&gcc WIFI1_RADIO_COLD_RESET>,
546 <&gcc WIFI1_CORE_WARM_RESET>,
547 <&gcc WIFI1_CORE_COLD_RESET>;
551 clocks = <&gcc GCC_WCSS5G_CLK>,
552 <&gcc GCC_WCSS5G_REF_CLK>,
553 <&gcc GCC_WCSS5G_RTC_CLK>;