Lines Matching +full:0 +full:xf08
21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
81 reg = <0x2>;
83 clock-frequency = <0>;
95 reg = <0x3>;
97 clock-frequency = <0>;
133 reg = <0x0 0x0>;
146 #clock-cells = <0>;
152 #clock-cells = <0>;
164 interrupts = <1 2 0xf08>,
165 <1 3 0xf08>,
166 <1 4 0xf08>,
167 <1 1 0xf08>;
182 reg = <0x0b000000 0x1000>,
183 <0x0b002000 0x1000>;
190 reg = <0x1800000 0x60000>;
195 reg = <0x22000 0x140>;
203 reg = <0x01000000 0x300000>;
205 gpio-ranges = <&tlmm 0 0 100>;
214 reg = <0x7824900 0x11c>, <0x7824000 0x800>;
226 reg = <0x07884000 0x23000>;
231 qcom,ee = <0>;
237 reg = <0x78b5000 0x600>;
243 #size-cells = <0>;
251 reg = <0x78b6000 0x600>;
257 #size-cells = <0>;
265 reg = <0x78b7000 0x600>;
271 #size-cells = <0>;
279 reg = <0x78b8000 0x600>;
285 #size-cells = <0>;
293 reg = <0x08e04000 0x20000>;
305 reg = <0x08e3a000 0x6000>;
317 reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
322 reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
327 reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
332 reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
337 reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
343 reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
349 reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
355 reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
361 reg = <0xb012000 0x1000>;
367 reg = <0x78af000 0x200>;
373 dmas = <&blsp_dma 1>, <&blsp_dma 0>;
379 reg = <0x78b0000 0x200>;
391 reg = <0xb017000 0x40>;
399 reg = <0x4ab000 0x4>;
404 reg = <0x40000000 0xf1d
405 0x40000f20 0xa8
406 0x80000 0x2000
407 0x40100000 0x1000>;
410 linux,pci-domain = <0>;
411 bus-range = <0x00 0xff>;
416 ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>,
417 <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>;
422 interrupt-map-mask = <0 0 0 0x7>;
423 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
424 <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
425 <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
426 <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
464 reg = <0x7984000 0x1a000>;
469 qcom,ee = <0>;
475 reg = <0x79b0000 0x1000>;
477 #size-cells = <0>;
482 dmas = <&qpic_bam 0>,
488 nand@0 {
489 reg = <0>;
499 reg = <0xa000000 0x200000>;
541 reg = <0xa800000 0x200000>;
583 #size-cells = <0>;
585 reg = <0x90000 0x64>;
588 ethphy0: ethernet-phy@0 {
589 reg = <0>;