Lines Matching +full:0 +full:x80040000
16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0>;
27 timebase-frequency = <0>;
28 bus-frequency = <0>;
29 clock-frequency = <0>;
51 ranges = <0x40000000 0x40000000 0x80000000>;
55 reg = <0x80040000 0x1000>;
59 arm,filter-ranges = <0 0x40000000>;
66 reg = <0x80020000 0x1000>;
73 ranges = <0x88000000 0x88000000 0x40000>;
77 reg = <0x88000000 0x1000>;
84 reg = <0x88010000 0x1000>;
90 reg = <0x88020000 0x1000>;
95 reg = <0x88030000 0x1000>;
104 ranges = <0x90000000 0x90000000 0x10000>;
108 reg = <0x90000000 0x2000>;
115 reg = <0x90002000 0x200>;
125 ranges = <0x90010000 0x90010000 0x30000>;
129 reg = <0x90010000 0x20000>;
135 reg = <0x90020000 0x10000>;
146 ranges = <0x98000000 0x98000000 0x8000000>;
150 reg = <0x98000000 0x8000000>;
160 ranges = <0xa0000000 0xa0000000 0x8000000>;
164 reg = <0xa0000000 0x8000000>;
174 ranges = <0xa8000000 0xa8000000 0x2000000>;
178 reg = <0xa8000000 0x10000>;
185 reg = <0xa8010000 0x10000>;
193 reg = <0xa9000000 0x1000000>;
196 resets = <&rstc 0>;
204 ranges = <0xb0000000 0xb0000000 0x180000>,
205 <0x56000000 0x56000000 0x1b00000>;
209 reg = <0xb0020000 0x1000>;
210 interrupts = <0>;
216 reg = <0xb0030000 0x10000>;
223 reg = <0xb0040000 0x10000>;
229 cell-index = <0>;
231 reg = <0xb0050000 0x1000>;
242 reg = <0xb0060000 0x1000>;
251 reg = <0xb0070000 0x1000>;
260 cell-index = <0>;
262 reg = <0xb0080000 0x10000>;
273 reg = <0xb0090000 0x10000>;
284 reg = <0xb00a0000 0x10000>;
293 cell-index = <0>;
295 reg = <0xb00b0000 0x10000>;
304 reg = <0xb0160000 0x10000>;
312 reg = <0xb00C0000 0x10000>;
319 cell-index = <0>;
321 reg = <0xb00d0000 0x10000>;
328 #size-cells = <0>;
336 reg = <0xb0170000 0x10000>;
343 #size-cells = <0>;
349 cell-index = <0>;
351 reg = <0xb00e0000 0x10000>;
355 #size-cells = <0>;
361 reg = <0xb00f0000 0x10000>;
365 #size-cells = <0>;
370 reg = <0xb0110000 0x10000>;
379 reg = <0xb0120000 0x10000>;
384 lcd_16pins_a: lcd0@0 {
402 lcdrom_pins_a: lcdrom0@0 {
408 uart0_pins_a: uart0@0 {
420 uart1_pins_a: uart1@0 {
426 uart2_pins_a: uart2@0 {
438 spi0_pins_a: spi0@0 {
444 spi1_pins_a: spi1@0 {
450 i2c0_pins_a: i2c0@0 {
456 i2c1_pins_a: i2c1@0 {
462 pwm0_pins_a: pwm0@0 {
468 pwm1_pins_a: pwm1@0 {
474 pwm2_pins_a: pwm2@0 {
480 pwm3_pins_a: pwm3@0 {
486 gps_pins_a: gps@0 {
492 vip_pins_a: vip@0 {
498 sdmmc0_pins_a: sdmmc0@0 {
504 sdmmc1_pins_a: sdmmc1@0 {
510 sdmmc2_pins_a: sdmmc2@0 {
516 sdmmc3_pins_a: sdmmc3@0 {
522 sdmmc4_pins_a: sdmmc4@0 {
528 sdmmc5_pins_a: sdmmc5@0 {
534 i2s_mclk_pins_a: i2s_mclk@0 {
540 i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
546 i2s_pins_a: i2s@0 {
552 i2s_no_din_pins_a: i2s_no_din@0 {
558 i2s_6chn_pins_a: i2s_6chn@0 {
564 ac97_pins_a: ac97@0 {
570 nand_pins_a: nand@0 {
576 usp0_pins_a: usp0@0 {
602 usp1_pins_a: usp1@0 {
616 usp2_pins_a: usp2@0 {
630 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
636 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
642 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
648 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
654 warm_rst_pins_a: warm_rst@0 {
660 pulse_count_pins_a: pulse_count@0 {
666 cko0_pins_a: cko0@0 {
672 cko1_pins_a: cko1@0 {
682 reg = <0xb0130000 0x10000>;
688 reg = <0xb0140000 0x10000>;
694 reg = <0xb0150000 0x10000>;
703 ranges = <0x56000000 0x56000000 0x1b00000>;
706 cell-index = <0>;
708 reg = <0x56000000 0x100000>;
718 reg = <0x56100000 0x100000>;
728 reg = <0x56200000 0x100000>;
737 reg = <0x56300000 0x100000>;
746 reg = <0x56400000 0x100000>;
755 reg = <0x56500000 0x100000>;
762 reg = <0x57900000 0x100000>;
768 reg = <0x57a00000 0x100000>;
777 reg = <0x80030000 0x10000>;
781 reg = <0x1000 0x1000>;
787 reg = <0x2000 0x1000>;
793 reg = <0x2000 0x1000>;
799 reg = <0x3000 0x1000>;
808 ranges = <0xb8000000 0xb8000000 0x40000>;
812 reg = <0xb8000000 0x10000>;
819 reg = <0xb8010000 0x10000>;
826 reg = <0xb8020000 0x10000>;
832 reg = <0xb8030000 0x10000>;