Lines Matching +full:0 +full:x50000
12 #address-cells = <0>;
13 #size-cells = <0>;
33 #size-cells = <0>;
34 reg = <0x800a0048 4>;
37 tzprot_clk: clock@0 {
40 picochip,clk-disable-bit = <0>;
120 reg = <0x800a0050 0x8>;
139 ranges = <0 0x80000000 0x400000>;
143 reg = <0x30000 0x10000>;
150 reg = <0x40000 0x10000>;
157 reg = <0x50000 0x10000>;
165 reg = <0x60000 0x1000>;
172 reg = <0x64000 0x1000>;
178 reg = <0x80000 0x10000>;
183 reg = <0x90000 0x10000>;
190 reg = <0x100000 0x10000>;
198 reg = <0x140000 0x10000>;
205 reg = <0x180000 0x10000>;
215 ranges = <0 0x200000 0x80000>;
217 rtc0: rtc@0 {
220 reg = <0x00000 0xf>;
230 reg = <0x10000 0x14>;
238 reg = <0x10014 0x14>;
243 reg = <0x20000 0x1000>;
245 #size-cells = <0>;
247 banka: gpio-controller@0 {
253 regoffset-dat = <0x50>;
254 regoffset-set = <0x00>;
255 regoffset-dirout = <0x04>;
264 regoffset-dat = <0x54>;
265 regoffset-set = <0x0c>;
266 regoffset-dirout = <0x10>;
275 regoffset-dat = <0x5c>;
276 regoffset-set = <0x24>;
277 regoffset-dirout = <0x28>;
283 reg = <0x30000 0x1000>;
293 reg = <0x40000 0x1000>;
303 reg = <0x50000 0x10000>;
314 reg = <0x60000 0x14>;
322 reg = <0x60014 0x14>;
337 ranges = <0 0 0x40000000 0x08000000
338 1 0 0x48000000 0x08000000
339 2 0 0x50000000 0x08000000
340 3 0 0x58000000 0x08000000>;
345 reg = <0xc0000000 0x10000>;
352 reg = <0xffff8000 0x8000>;