Lines Matching +full:axi +full:- +full:apb
1 // SPDX-License-Identifier: GPL-2.0-only
8 #address-cells = <1>;
9 #size-cells = <1>;
12 #address-cells = <0>;
13 #size-cells = <0>;
16 compatible = "arm,arm1176jz-s";
18 clock-frequency = <400000000>;
19 d-cache-line-size = <32>;
20 d-cache-size = <32768>;
21 i-cache-line-size = <32>;
22 i-cache-size = <32768>;
27 #address-cells = <1>;
28 #size-cells = <1>;
32 compatible = "fixed-clock";
33 clock-outputs = "bus", "pclk";
34 clock-frequency = <200000000>;
35 ref-clock = <&ref_clk>, "ref";
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
52 compatible = "snps,dw-dmac";
58 compatible = "snps,dw-dmac";
63 vic0: interrupt-controller@60000 {
64 compatible = "arm,pl192-vic";
65 interrupt-controller;
67 #interrupt-cells = <1>;
70 vic1: interrupt-controller@64000 {
71 compatible = "arm,pl192-vic";
72 interrupt-controller;
74 #interrupt-cells = <1>;
77 fuse: picoxcell-fuse@80000 {
78 compatible = "picoxcell,fuse-pc3x2";
82 ssi: picoxcell-spi@90000 {
85 interrupt-parent = <&vic0>;
90 compatible = "picochip,spacc-ipsec";
92 interrupt-parent = <&vic0>;
94 ref-clock = <&pclk>, "ref";
98 compatible = "picochip,spacc-srtp";
100 interrupt-parent = <&vic0>;
105 compatible = "picochip,spacc-l2";
107 interrupt-parent = <&vic0>;
109 ref-clock = <&pclk>, "ref";
112 apb {
113 compatible = "simple-bus";
114 #address-cells = <1>;
115 #size-cells = <1>;
119 compatible = "picochip,pc3x2-rtc";
120 clock-freq = <200000000>;
122 interrupt-parent = <&vic1>;
127 compatible = "picochip,pc3x2-timer";
128 interrupt-parent = <&vic0>;
130 clock-freq = <200000000>;
135 compatible = "picochip,pc3x2-timer";
136 interrupt-parent = <&vic0>;
138 clock-freq = <200000000>;
143 compatible = "picochip,pc3x2-timer";
144 interrupt-parent = <&vic0>;
146 clock-freq = <200000000>;
151 compatible = "picochip,pc3x2-timer";
152 interrupt-parent = <&vic0>;
154 clock-freq = <200000000>;
159 compatible = "snps,dw-apb-gpio";
161 #address-cells = <1>;
162 #size-cells = <0>;
164 banka: gpio-controller@0 {
165 compatible = "snps,dw-apb-gpio-bank";
166 gpio-controller;
167 #gpio-cells = <2>;
168 gpio-generic,nr-gpio = <8>;
170 regoffset-dat = <0x50>;
171 regoffset-set = <0x00>;
172 regoffset-dirout = <0x04>;
175 bankb: gpio-controller@1 {
176 compatible = "snps,dw-apb-gpio-bank";
177 gpio-controller;
178 #gpio-cells = <2>;
179 gpio-generic,nr-gpio = <8>;
181 regoffset-dat = <0x54>;
182 regoffset-set = <0x0c>;
183 regoffset-dirout = <0x10>;
188 compatible = "snps,dw-apb-uart";
190 interrupt-parent = <&vic1>;
192 clock-frequency = <3686400>;
193 reg-shift = <2>;
194 reg-io-width = <4>;
198 compatible = "snps,dw-apb-uart";
200 interrupt-parent = <&vic1>;
202 clock-frequency = <3686400>;
203 reg-shift = <2>;
204 reg-io-width = <4>;
208 compatible = "snps,dw-apb-wdg";
210 interrupt-parent = <&vic0>;
212 bus-clock = <&pclk>, "bus";
217 rwid-axi {
218 #address-cells = <1>;
219 #size-cells = <1>;
220 compatible = "simple-bus";
224 compatible = "simple-bus";
225 #address-cells = <2>;
226 #size-cells = <1>;
234 compatible = "picochip,axi2pico-pc3x2";