Lines Matching +full:cortex +full:- +full:a9
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (c) 2016-2017 Andreas Färber
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/owl-s500-powergate.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
29 compatible = "arm,cortex-a9";
31 enable-method = "actions,s500-smp";
36 compatible = "arm,cortex-a9";
38 enable-method = "actions,s500-smp";
43 compatible = "arm,cortex-a9";
45 enable-method = "actions,s500-smp";
46 power-domains = <&sps S500_PD_CPU2>;
51 compatible = "arm,cortex-a9";
53 enable-method = "actions,s500-smp";
54 power-domains = <&sps S500_PD_CPU3>;
58 arm-pmu {
59 compatible = "arm,cortex-a9-pmu";
64 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
68 compatible = "fixed-clock";
69 clock-frequency = <24000000>;
70 #clock-cells = <0>;
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
80 compatible = "arm,cortex-a9-scu";
85 compatible = "arm,cortex-a9-global-timer";
92 compatible = "arm,cortex-a9-twd-timer";
99 compatible = "arm,cortex-a9-twd-wdt";
105 gic: interrupt-controller@b0021000 {
106 compatible = "arm,cortex-a9-gic";
109 interrupt-controller;
110 #interrupt-cells = <3>;
113 l2: cache-controller@b0022000 {
114 compatible = "arm,pl310-cache";
116 cache-unified;
117 cache-level = <2>;
119 arm,tag-latency = <3 3 2>;
120 arm,data-latency = <5 3 3>;
124 compatible = "actions,s500-uart", "actions,owl-uart";
131 compatible = "actions,s500-uart", "actions,owl-uart";
138 compatible = "actions,s500-uart", "actions,owl-uart";
145 compatible = "actions,s500-uart", "actions,owl-uart";
152 compatible = "actions,s500-uart", "actions,owl-uart";
159 compatible = "actions,s500-uart", "actions,owl-uart";
166 compatible = "actions,s500-uart", "actions,owl-uart";
173 compatible = "actions,s500-timer";
179 interrupt-names = "2hz0", "2hz1", "timer0", "timer1";
182 sps: power-controller@b01b0100 {
183 compatible = "actions,s500-sps";
185 #power-domain-cells = <1>;