Lines Matching +full:regulator +full:- +full:settling +full:- +full:time +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,cortex-a9";
40 next-level-cache = <&L2>;
44 clock-names = "cpu";
46 clock-latency = <300000>; /* From omap-cpufreq driver */
49 compatible = "arm,cortex-a9";
51 next-level-cache = <&L2>;
63 compatible = "arm,cortex-a9-pmu";
67 gic: interrupt-controller@48241000 {
68 compatible = "arm,cortex-a9-gic";
69 interrupt-controller;
70 #interrupt-cells = <3>;
73 interrupt-parent = <&gic>;
76 L2: cache-controller@48242000 {
77 compatible = "arm,pl310-cache";
79 cache-unified;
80 cache-level = <2>;
83 local-timer@48240600 {
84 compatible = "arm,cortex-a9-twd-timer";
88 interrupt-parent = <&gic>;
91 wakeupgen: interrupt-controller@48281000 {
92 compatible = "ti,omap4-wugen-mpu";
93 interrupt-controller;
94 #interrupt-cells = <3>;
96 interrupt-parent = <&gic>;
104 compatible = "ti,omap-infra";
106 compatible = "ti,omap4-mpu";
125 compatible = "ti,omap4-l3-noc", "simple-bus";
126 #address-cells = <1>;
127 #size-cells = <1>;
149 compatible = "mmio-sram";
154 compatible = "ti,omap4430-gpmc";
156 #address-cells = <2>;
157 #size-cells = <1>;
160 dma-names = "rxtx";
161 gpmc,num-cs = <8>;
162 gpmc,num-waitpins = <4>;
164 ti,no-idle-on-init;
166 clock-names = "fck";
167 interrupt-controller;
168 #interrupt-cells = <2>;
169 gpio-controller;
170 #gpio-cells = <2>;
173 target-module@52000000 {
174 compatible = "ti,sysc-omap4", "ti,sysc";
178 reg-names = "rev", "sysc";
179 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
180 ti,sysc-midle = <SYSC_IDLE_FORCE>,
184 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
188 ti,sysc-delay-us = <2>;
190 clock-names = "fck";
191 #address-cells = <1>;
192 #size-cells = <1>;
198 target-module@55082000 {
199 compatible = "ti,sysc-omap2", "ti,sysc";
203 reg-names = "rev", "sysc", "syss";
204 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
207 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
211 clock-names = "fck";
213 reset-names = "rstctrl";
215 #size-cells = <1>;
216 #address-cells = <1>;
219 compatible = "ti,omap4-iommu";
222 #iommu-cells = <0>;
223 ti,iommu-bus-err-back;
227 target-module@4012c000 {
228 compatible = "ti,sysc-omap4", "ti,sysc";
231 reg-names = "rev", "sysc";
232 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
233 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
238 clock-names = "fck";
239 #address-cells = <1>;
240 #size-cells = <1>;
248 compatible = "ti,omap4-dmm";
255 compatible = "ti,emif-4d";
259 ti,no-idle-on-init;
260 phy-type = <1>;
261 hw-caps-read-idle-ctrl;
262 hw-caps-ll-interface;
263 hw-caps-temp-alert;
267 compatible = "ti,emif-4d";
271 ti,no-idle-on-init;
272 phy-type = <1>;
273 hw-caps-read-idle-ctrl;
274 hw-caps-ll-interface;
275 hw-caps-temp-alert;
279 compatible = "ti,omap4-dsp";
284 firmware-name = "omap4-dsp-fw.xe64T";
290 compatible = "ti,omap4-ipu";
292 reg-names = "l2ram";
296 firmware-name = "omap4-ipu-fw.xem3";
301 aes1_target: target-module@4b501000 {
302 compatible = "ti,sysc-omap2", "ti,sysc";
306 reg-names = "rev", "sysc", "syss";
307 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
309 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
313 ti,syss-mask = <1>;
316 clock-names = "fck";
317 #address-cells = <1>;
318 #size-cells = <1>;
322 compatible = "ti,omap4-aes";
326 dma-names = "tx", "rx";
330 aes2_target: target-module@4b701000 {
331 compatible = "ti,sysc-omap2", "ti,sysc";
335 reg-names = "rev", "sysc", "syss";
336 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
338 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
342 ti,syss-mask = <1>;
345 clock-names = "fck";
346 #address-cells = <1>;
347 #size-cells = <1>;
351 compatible = "ti,omap4-aes";
355 dma-names = "tx", "rx";
359 sham_target: target-module@4b100000 {
360 compatible = "ti,sysc-omap3-sham", "ti,sysc";
364 reg-names = "rev", "sysc", "syss";
365 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
367 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
370 ti,syss-mask = <1>;
373 clock-names = "fck";
374 #address-cells = <1>;
375 #size-cells = <1>;
379 compatible = "ti,omap4-sham";
383 dma-names = "rx";
387 abb_mpu: regulator-abb-mpu {
388 compatible = "ti,abb-v2";
389 regulator-name = "abb_mpu";
390 #address-cells = <0>;
391 #size-cells = <0>;
392 ti,tranxdone-status-mask = <0x80>;
394 ti,settling-time = <50>;
395 ti,clock-cycles = <16>;
400 abb_iva: regulator-abb-iva {
401 compatible = "ti,abb-v2";
402 regulator-name = "abb_iva";
403 #address-cells = <0>;
404 #size-cells = <0>;
405 ti,tranxdone-status-mask = <0x80000000>;
407 ti,settling-time = <50>;
408 ti,clock-cycles = <16>;
413 sgx_module: target-module@56000000 {
414 compatible = "ti,sysc-omap4", "ti,sysc";
417 reg-names = "rev", "sysc";
418 ti,sysc-midle = <SYSC_IDLE_FORCE>,
422 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
427 clock-names = "fck";
428 #address-cells = <1>;
429 #size-cells = <1>;
442 target-module@58000000 {
443 compatible = "ti,sysc-omap2", "ti,sysc";
446 reg-names = "rev", "syss";
447 ti,syss-mask = <1>;
452 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
453 #address-cells = <1>;
454 #size-cells = <1>;
458 compatible = "ti,omap4-dss";
462 clock-names = "fck";
463 #address-cells = <1>;
464 #size-cells = <1>;
467 target-module@1000 {
468 compatible = "ti,sysc-omap2", "ti,sysc";
472 reg-names = "rev", "sysc", "syss";
473 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
476 ti,sysc-midle = <SYSC_IDLE_FORCE>,
479 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
483 ti,syss-mask = <1>;
486 clock-names = "fck", "sys_clk";
487 #address-cells = <1>;
488 #size-cells = <1>;
492 compatible = "ti,omap4-dispc";
496 clock-names = "fck";
500 target-module@2000 {
501 compatible = "ti,sysc-omap2", "ti,sysc";
505 reg-names = "rev", "sysc", "syss";
506 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
509 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
511 ti,syss-mask = <1>;
514 clock-names = "fck", "sys_clk";
515 #address-cells = <1>;
516 #size-cells = <1>;
523 clock-names = "fck", "ick";
527 target-module@3000 {
528 compatible = "ti,sysc-omap2", "ti,sysc";
530 reg-names = "rev";
532 clock-names = "sys_clk";
533 #address-cells = <1>;
534 #size-cells = <1>;
538 compatible = "ti,omap4-venc";
542 clock-names = "fck";
546 target-module@4000 {
547 compatible = "ti,sysc-omap2", "ti,sysc";
551 reg-names = "rev", "sysc", "syss";
552 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
555 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
559 ti,syss-mask = <1>;
560 #address-cells = <1>;
561 #size-cells = <1>;
565 compatible = "ti,omap4-dsi";
569 reg-names = "proto", "phy", "pll";
574 clock-names = "fck", "sys_clk";
576 #address-cells = <1>;
577 #size-cells = <0>;
581 target-module@5000 {
582 compatible = "ti,sysc-omap2", "ti,sysc";
586 reg-names = "rev", "sysc", "syss";
587 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
590 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
594 ti,syss-mask = <1>;
595 #address-cells = <1>;
596 #size-cells = <1>;
600 compatible = "ti,omap4-dsi";
604 reg-names = "proto", "phy", "pll";
609 clock-names = "fck", "sys_clk";
611 #address-cells = <1>;
612 #size-cells = <0>;
616 target-module@6000 {
617 compatible = "ti,sysc-omap4", "ti,sysc";
620 reg-names = "rev", "sysc";
625 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
627 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
630 clock-names = "fck", "dss_clk";
631 #address-cells = <1>;
632 #size-cells = <1>;
636 compatible = "ti,omap4-hdmi";
641 reg-names = "wp", "pll", "phy", "core";
646 clock-names = "fck", "sys_clk";
648 dma-names = "audio_tx";
656 #include "omap4-l4.dtsi"
657 #include "omap4-l4-abe.dtsi"
658 #include "omap44xx-clocks.dtsi"
662 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
664 #reset-cells = <1>;
668 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
670 #power-domain-cells = <0>;
674 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
676 #reset-cells = <1>;
680 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
682 #reset-cells = <1>;
686 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
688 #reset-cells = <1>;
692 /* Preferred always-on timer for clockevent */
694 ti,no-reset-on-init;
695 ti,no-idle;
697 assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
698 assigned-clock-parents = <&sys_32k_ck>;