Lines Matching +full:cortex +full:- +full:a8
4 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/omap.h>
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
37 compatible = "arm,cortex-a8";
42 clock-names = "cpu";
44 clock-latency = <300000>; /* From omap-cpufreq driver */
49 compatible = "arm,cortex-a8-pmu";
60 compatible = "ti,omap-infra";
62 compatible = "ti,omap3-mpu";
71 compatible = "ti,omap3-c64";
84 compatible = "ti,omap3-l3-smx", "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
93 compatible = "ti,omap3-l4-core", "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
99 compatible = "ti,omap3-scm", "simple-bus";
101 #address-cells = <1>;
102 #size-cells = <1>;
106 compatible = "ti,omap3-padconf",
107 "pinctrl-single";
109 #address-cells = <1>;
110 #size-cells = <0>;
111 #pinctrl-cells = <1>;
112 #interrupt-cells = <1>;
113 interrupt-controller;
114 pinctrl-single,register-width = <16>;
115 pinctrl-single,function-mask = <0xff1f>;
119 compatible = "syscon", "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
126 compatible = "ti,pbias-omap3", "ti,pbias-omap";
130 regulator-name = "pbias_mmc_omap2430";
131 regulator-min-microvolt = <1800000>;
132 regulator-max-microvolt = <3000000>;
137 #address-cells = <1>;
138 #size-cells = <0>;
146 compatible = "ti,omap3-padconf",
147 "pinctrl-single";
149 #address-cells = <1>;
150 #size-cells = <0>;
151 #pinctrl-cells = <1>;
152 #interrupt-cells = <1>;
153 interrupt-controller;
154 pinctrl-single,register-width = <16>;
155 pinctrl-single,function-mask = <0xff1f>;
160 aes1_target: target-module@480a6000 {
161 compatible = "ti,sysc-omap2", "ti,sysc";
165 reg-names = "rev", "sysc", "syss";
166 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
167 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
170 ti,syss-mask = <1>;
172 clock-names = "ick";
173 #address-cells = <1>;
174 #size-cells = <1>;
178 compatible = "ti,omap3-aes";
182 dma-names = "tx", "rx";
186 aes2_target: target-module@480c5000 {
187 compatible = "ti,sysc-omap2", "ti,sysc";
191 reg-names = "rev", "sysc", "syss";
192 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
193 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
196 ti,syss-mask = <1>;
198 clock-names = "ick";
199 #address-cells = <1>;
200 #size-cells = <1>;
204 compatible = "ti,omap3-aes";
208 dma-names = "tx", "rx";
213 compatible = "ti,omap3-prm";
218 #address-cells = <1>;
219 #size-cells = <0>;
227 compatible = "ti,omap3-cm";
231 #address-cells = <1>;
232 #size-cells = <0>;
239 target-module@48320000 {
240 compatible = "ti,sysc-omap2", "ti,sysc";
243 reg-names = "rev", "sysc";
244 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
247 clock-names = "fck", "ick";
248 #address-cells = <1>;
249 #size-cells = <1>;
253 compatible = "ti,omap-counter32k";
258 intc: interrupt-controller@48200000 {
259 compatible = "ti,omap3-intc";
260 interrupt-controller;
261 #interrupt-cells = <1>;
265 target-module@48056000 {
266 compatible = "ti,sysc-omap2", "ti,sysc";
270 reg-names = "rev", "sysc", "syss";
271 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
275 ti,sysc-midle = <SYSC_IDLE_FORCE>,
278 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
281 ti,syss-mask = <1>;
284 clock-names = "ick";
285 #address-cells = <1>;
286 #size-cells = <1>;
289 sdma: dma-controller@0 {
290 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
296 #dma-cells = <1>;
297 dma-channels = <32>;
298 dma-requests = <96>;
303 compatible = "ti,omap3-gpio";
307 ti,gpio-always-on;
308 gpio-controller;
309 #gpio-cells = <2>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
315 compatible = "ti,omap3-gpio";
319 gpio-controller;
320 #gpio-cells = <2>;
321 interrupt-controller;
322 #interrupt-cells = <2>;
326 compatible = "ti,omap3-gpio";
330 gpio-controller;
331 #gpio-cells = <2>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
337 compatible = "ti,omap3-gpio";
341 gpio-controller;
342 #gpio-cells = <2>;
343 interrupt-controller;
344 #interrupt-cells = <2>;
348 compatible = "ti,omap3-gpio";
352 gpio-controller;
353 #gpio-cells = <2>;
354 interrupt-controller;
355 #interrupt-cells = <2>;
359 compatible = "ti,omap3-gpio";
363 gpio-controller;
364 #gpio-cells = <2>;
365 interrupt-controller;
366 #interrupt-cells = <2>;
370 compatible = "ti,omap3-uart";
372 interrupts-extended = <&intc 72>;
374 dma-names = "tx", "rx";
376 clock-frequency = <48000000>;
380 compatible = "ti,omap3-uart";
382 interrupts-extended = <&intc 73>;
384 dma-names = "tx", "rx";
386 clock-frequency = <48000000>;
390 compatible = "ti,omap3-uart";
392 interrupts-extended = <&intc 74>;
394 dma-names = "tx", "rx";
396 clock-frequency = <48000000>;
400 compatible = "ti,omap3-i2c";
404 dma-names = "tx", "rx";
405 #address-cells = <1>;
406 #size-cells = <0>;
411 compatible = "ti,omap3-i2c";
415 dma-names = "tx", "rx";
416 #address-cells = <1>;
417 #size-cells = <0>;
422 compatible = "ti,omap3-i2c";
426 dma-names = "tx", "rx";
427 #address-cells = <1>;
428 #size-cells = <0>;
433 compatible = "ti,omap3-mailbox";
437 #mbox-cells = <1>;
438 ti,mbox-num-users = <2>;
439 ti,mbox-num-fifos = <2>;
441 ti,mbox-tx = <0 0 0>;
442 ti,mbox-rx = <1 0 0>;
447 compatible = "ti,omap2-mcspi";
450 #address-cells = <1>;
451 #size-cells = <0>;
453 ti,spi-num-cs = <4>;
462 dma-names = "tx0", "rx0", "tx1", "rx1",
467 compatible = "ti,omap2-mcspi";
470 #address-cells = <1>;
471 #size-cells = <0>;
473 ti,spi-num-cs = <2>;
478 dma-names = "tx0", "rx0", "tx1", "rx1";
482 compatible = "ti,omap2-mcspi";
485 #address-cells = <1>;
486 #size-cells = <0>;
488 ti,spi-num-cs = <2>;
493 dma-names = "tx0", "rx0", "tx1", "rx1";
497 compatible = "ti,omap2-mcspi";
500 #address-cells = <1>;
501 #size-cells = <0>;
503 ti,spi-num-cs = <1>;
505 dma-names = "tx0", "rx0";
509 compatible = "ti,omap3-1w";
516 compatible = "ti,omap3-hsmmc";
520 ti,dual-volt;
522 dma-names = "tx", "rx";
523 pbias-supply = <&pbias_mmc_reg>;
527 compatible = "ti,omap3-hsmmc";
532 dma-names = "tx", "rx";
536 compatible = "ti,omap3-hsmmc";
541 dma-names = "tx", "rx";
545 #iommu-cells = <0>;
546 compatible = "ti,omap2-iommu";
550 ti,#tlb-entries = <8>;
554 #iommu-cells = <0>;
555 compatible = "ti,omap2-iommu";
563 compatible = "ti,omap3-wdt";
569 compatible = "ti,omap3-mcbsp";
571 reg-names = "mpu";
575 interrupt-names = "common", "tx", "rx";
576 ti,buffer-size = <128>;
580 dma-names = "tx", "rx";
582 clock-names = "fck";
587 rng_target: target-module@480a0000 {
588 compatible = "ti,sysc-omap2", "ti,sysc";
592 reg-names = "rev", "sysc", "syss";
593 ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
594 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
596 ti,syss-mask = <1>;
598 clock-names = "ick";
599 #address-cells = <1>;
600 #size-cells = <1>;
604 compatible = "ti,omap2-rng";
611 compatible = "ti,omap3-mcbsp";
614 reg-names = "mpu", "sidetone";
619 interrupt-names = "common", "tx", "rx", "sidetone";
620 ti,buffer-size = <1280>;
624 dma-names = "tx", "rx";
626 clock-names = "fck", "ick";
631 compatible = "ti,omap3-mcbsp";
634 reg-names = "mpu", "sidetone";
639 interrupt-names = "common", "tx", "rx", "sidetone";
640 ti,buffer-size = <128>;
644 dma-names = "tx", "rx";
646 clock-names = "fck", "ick";
651 compatible = "ti,omap3-mcbsp";
653 reg-names = "mpu";
657 interrupt-names = "common", "tx", "rx";
658 ti,buffer-size = <128>;
662 dma-names = "tx", "rx";
664 clock-names = "fck";
665 #sound-dai-cells = <0>;
670 compatible = "ti,omap3-mcbsp";
672 reg-names = "mpu";
676 interrupt-names = "common", "tx", "rx";
677 ti,buffer-size = <128>;
681 dma-names = "tx", "rx";
683 clock-names = "fck";
688 compatible = "ti,omap3-sham";
693 dma-names = "rx";
696 timer1_target: target-module@48318000 {
697 compatible = "ti,sysc-omap2-timer", "ti,sysc";
701 reg-names = "rev", "sysc", "syss";
702 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
707 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
710 ti,syss-mask = <1>;
712 clock-names = "fck", "ick";
713 #address-cells = <1>;
714 #size-cells = <1>;
718 compatible = "ti,omap3430-timer";
721 clock-names = "fck";
723 ti,timer-alwon;
727 timer2_target: target-module@49032000 {
728 compatible = "ti,sysc-omap2-timer", "ti,sysc";
732 reg-names = "rev", "sysc", "syss";
733 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
738 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
741 ti,syss-mask = <1>;
743 clock-names = "fck", "ick";
744 #address-cells = <1>;
745 #size-cells = <1>;
749 compatible = "ti,omap3430-timer";
756 compatible = "ti,omap3430-timer";
763 compatible = "ti,omap3430-timer";
770 compatible = "ti,omap3430-timer";
774 ti,timer-dsp;
778 compatible = "ti,omap3430-timer";
782 ti,timer-dsp;
786 compatible = "ti,omap3430-timer";
790 ti,timer-dsp;
794 compatible = "ti,omap3430-timer";
798 ti,timer-pwm;
799 ti,timer-dsp;
803 compatible = "ti,omap3430-timer";
807 ti,timer-pwm;
811 compatible = "ti,omap3430-timer";
815 ti,timer-pwm;
819 compatible = "ti,omap3430-timer";
823 ti,timer-pwm;
826 timer12_target: target-module@48304000 {
827 compatible = "ti,sysc-omap2-timer", "ti,sysc";
831 reg-names = "rev", "sysc", "syss";
832 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
837 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
840 ti,syss-mask = <1>;
842 clock-names = "fck", "ick";
843 #address-cells = <1>;
844 #size-cells = <1>;
848 compatible = "ti,omap3430-timer";
851 ti,timer-alwon;
852 ti,timer-secure;
857 compatible = "ti,usbhs-tll";
864 compatible = "ti,usbhs-host";
867 #address-cells = <1>;
868 #size-cells = <1>;
872 compatible = "ti,ohci-omap3";
875 remote-wakeup-connected;
879 compatible = "ti,ehci-omap";
886 compatible = "ti,omap3430-gpmc";
891 dma-names = "rxtx";
892 gpmc,num-cs = <8>;
893 gpmc,num-waitpins = <4>;
894 #address-cells = <2>;
895 #size-cells = <1>;
896 interrupt-controller;
897 #interrupt-cells = <2>;
898 gpio-controller;
899 #gpio-cells = <2>;
903 compatible = "ti,omap3-musb";
906 interrupt-names = "mc", "dma";
909 num-eps = <16>;
910 ram-bits = <12>;
914 compatible = "ti,omap3-dss";
919 clock-names = "fck";
920 #address-cells = <1>;
921 #size-cells = <1>;
925 compatible = "ti,omap3-dispc";
930 clock-names = "fck";
934 compatible = "ti,omap3-dsi";
938 reg-names = "proto", "phy", "pll";
943 clock-names = "fck", "sys_clk";
945 #address-cells = <1>;
946 #size-cells = <0>;
950 compatible = "ti,omap3-rfbi";
955 clock-names = "fck", "ick";
959 compatible = "ti,omap3-venc";
964 clock-names = "fck";
968 ssi: ssi-controller@48058000 {
969 compatible = "ti,omap3-ssi";
976 reg-names = "sys",
980 interrupt-names = "gdd_mpu";
982 #address-cells = <1>;
983 #size-cells = <1>;
986 ssi_port1: ssi-port@4805a000 {
987 compatible = "ti,omap3-ssi-port";
991 reg-names = "tx",
998 ssi_port2: ssi-port@4805b000 {
999 compatible = "ti,omap3-ssi-port";
1003 reg-names = "tx",
1013 #include "omap3xxx-clocks.dtsi"
1015 /* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */
1017 ti,no-reset-on-init;
1018 ti,no-idle;
1020 assigned-clocks = <&gpt1_fck>;
1021 assigned-clock-parents = <&omap_32k_fck>;