Lines Matching +full:0 +full:x2c000000
12 reg = <0x80000000 0x10000000>; /* 256 MB */
74 #size-cells = <0>;
76 port@0 {
77 reg = <0>;
125 reg = <0x48>;
168 ti,pulldowns = <0x03a1c6>;
172 linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
173 MATRIX_KEY(1, 0, KEY_2)
174 MATRIX_KEY(2, 0, KEY_3)
175 MATRIX_KEY(0, 1, KEY_4)
179 MATRIX_KEY(0, 2, KEY_7)
183 MATRIX_KEY(0, 3, KEY_F7)
201 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
202 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
204 nand@0,0 {
206 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
208 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
214 gpmc,sync-clk-ps = <0>;
215 gpmc,cs-on-ns = <0>;
227 gpmc,wr-data-mux-bus-ns = <0>;
232 x-loader@0 {
234 reg = <0 0x80000>;
239 reg = <0x80000 0x1e0000>;
244 reg = <0x260000 0x20000>;
249 reg = <0x280000 0x400000>;
254 reg = <0x680000 0xf980000>;
258 ethernet@6,0 {
260 reg = <6 0x000 2
261 6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
267 gpmc,mux-add-data = <0>;
269 gpmc,wait-pin = <0>;
276 gpmc,adv-on-ns = <0>;
289 gpmc,wait-monitoring-ns = <0>;
290 gpmc,clk-activation-ns = <0>;
291 gpmc,wr-data-mux-bus-ns = <0>;
292 gpmc,wr-access-ns = <0>;
299 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
300 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
301 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
302 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
303 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
304 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
305 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
306 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
307 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
308 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
309 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
310 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
311 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
312 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
313 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
314 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
315 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
316 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
317 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
318 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
319 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
320 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
321 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
322 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
323 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
324 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
325 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
326 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
343 pinctrl-0 = <&dss_dpi_pins>;
350 #size-cells = <0>;
351 dpi_dvi_out: endpoint@0 {
352 reg = <0>;